Taehyoun Oh

Orcid: 0000-0002-6574-0590

According to our database1, Taehyoun Oh authored at least 9 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Highly Integrated Radio Frequency Receiver RF CMOS Module for Core Body Temperature Thermometer.
IEEE Access, 2023

2022
Linear Characteristic Analysis of High-Resolution Counter-Based Frequency Detector in Type-I Digital PLL.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Pseudo-Reference Counter-Based FLL for 6 Gb/s Reference-Less CDR in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

2016
A 4.1mA adaptive duty-cycle corrector loop with background calibration in 45nm CMOS process.
Proceedings of the International SoC Design Conference, 2016

2014
A 4Gb/s, 370µA low-power Tx FIR driver for LPDDR4 applications.
IEICE Electron. Express, 2014

2013
A 12-Gb/s Multichannel I/O Using MIMO Crosstalk Cancellation and Signal Reutilization in 65-nm CMOS.
IEEE J. Solid State Circuits, 2013

2012
4×12 Gb/s 0.96 pJ/b/lane analog-IIR crosstalk cancellation and signal reutilization receiver for single-ended I/Os in 65 nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2012

2011
A 6-Gb/s MIMO Crosstalk Cancellation Scheme for High-Speed I/Os.
IEEE J. Solid State Circuits, 2011

2010
A 5Gb/s 2×2 MIMO crosstalk cancellation scheme for high-speed I/Os.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010


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