Takeo Yasuda

According to our database, Takeo Yasuda authored at least 10 papers between 2000 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2023

An analog-AI chip for energy-efficient speech recognition and transcription.

Stefano Ambrogio, Pritish Narayanan, Atsuya Okazaki, Andrea Fasoli, Charles Mackin, Kohji Hosokawa, Akiyo Nomura, Takeo Yasuda, An Chen, Alexander M. Friz, Masatoshi Ishii, Jose Luquin, Yasuteru Kohda, Nicole Saulnier, Kevin Brew, Samuel Choi, Injo Ok, Timothy Philip, Victor Chan, Mary Claire Silvestre, Ishtiaq Ahsan, Vijay Narayanan, Hsinyu Tsai, Geoffrey W. Burr

Nat., 2023

Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited).

Geoffrey W. Burr, Pritish Narayanan, Stefano Ambrogio, Atsuya Okazaki, Hsinyu Tsai, Kohji Hosokawa, Charles Mackin, Akiyo Nomura, Takeo Yasuda, J. Demarest, Kevin Brew, Victor Chan, Samuel Choi, T. Gordon, T. M. Levin, Alexander M. Friz, Masatoshi Ishii, Yasuteru Kohda, An Chen, Andrea Fasoli, Jose Luquin, Nicole Saulnier, S. Teehan, Ishtiaq Ahsan, Vijay Narayanan

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited).

Hsinyu Tsai, Pritish Narayanan, Shubham Jain, Stefano Ambrogio, Kohji Hosokawa, Masatoshi Ishii, Charles Mackin, Ching-Tzu Chen, Atsuya Okazaki, Akiyo Nomura, Irem Boybat, Ramachandran Muralidhar, Martin M. Frank, Takeo Yasuda, Alexander M. Friz, Yasuteru Kohda, An Chen, Andrea Fasoli, Malte J. Rasch, Stanislaw Wozniak, Jose Luquin, Vijay Narayanan, Geoffrey W. Burr

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers.

Atsuya Okazaki, Pritish Narayanan, Stefano Ambrogio, Kohji Hosokawa, Hsinyu Tsai, Akiyo Nomura, Takeo Yasuda, Charles Mackin, Alexander M. Friz, Masatoshi Ishii, Yasuteru Kohda, Katie Spoon, An Chen, Andrea Fasoli, Malte J. Rasch, Geoffrey W. Burr

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2005

On-chip temperature sensor with high tolerance for process and temperature variation.

Takeo Yasuda

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003

A low power CMOS circuit with Variable Souce Scheme (VSCMOS).

Takeo Yasuda, Kohji Hosokawa

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002

An On-Chip Power-on Reset Circuit for Low Voltage Technology.

Takeo Yasuda, Masaaki Yamamoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

2001

A power-on reset pulse generator for low voltage applications.

Takeo Yasuda, Masaaki Yamamoto, Takafumi Nishi

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A dynamically phase adjusting PLL with a variable delay.

Takeo Yasuda, Hiroaki Fujita, Hidetoshi Onodera

Proceedings of ASP-DAC 2001, 2001

2000

High-speed wide-locking range VCO with frequency calibration.

Takeo Yasuda

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000