Vijay Narayanan
Orcid: 0009-0008-8433-963X
According to our database1,
Vijay Narayanan
authored at least 31 papers
between 2006 and 2023.
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Bibliography
2023
Programming Weights to Analog In-Memory Computing Cores by Direct Minimization of the Matrix-Vector Multiplication Error.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023
A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh.
IEEE Trans. Very Large Scale Integr. Syst., 2023
Nat., 2023
Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference.
CoRR, 2023
Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators.
CoRR, 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023
Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited).
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Impact of Phase-Change Memory Drift on Energy Efficiency and Accuracy of Analog Compute-in-Memory Deep Learning Inference (Invited).
Proceedings of the IEEE International Reliability Physics Symposium, 2023
AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing.
Proceedings of the IEEE International Conference on Edge Computing and Communications, 2023
2022
HERMES-Core - A 1.59-TOPS/mm<sup>2</sup> PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs.
IEEE J. Solid State Circuits, 2022
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference.
CoRR, 2022
CoRR, 2022
Impact of Phase-Change Memory Flicker Noise and Weight Drift on Analog Hardware Inference for Large-Scale Deep Learning Networks.
Adv. Intell. Syst., 2022
In-memory Realization of In-situ Few-shot Continual Learning with a Dynamically Evolving Explicit Memory.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigation.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
A Flexible and Fast PyTorch Toolkit for Simulating Training and Inference on Analog Crossbar Arrays.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
Hardware and Software Co-optimization for the Initialization Failure of the ReRAM-based Cross-bar Array.
ACM J. Emerg. Technol. Comput. Syst., 2020
2019
Proceedings of the IEEE International Reliability Physics Symposium, 2019
2018
PBTI in InGaAs MOS capacitors with Al2O3/HfO2/TiN gate stacks: Interface-state generation.
Proceedings of the IEEE International Reliability Physics Symposium, 2018
2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
Interface engineering of Si1-xGex gate stacks for high performance dual channel CMOS.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2015
High-mobility high-Ge-content Si1-xGex-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width.
Proceedings of the Symposium on VLSI Circuits, 2015
2013
CoRR, 2013
2010
Characterizing the soft error vulnerability of multicores running multithreaded applications.
Proceedings of the SIGMETRICS 2010, 2010
2009
3D GPU architecture using cache stacking: Performance, cost, power and thermal analysis.
Proceedings of the 27th International Conference on Computer Design, 2009
2006
Advanced high-k dielectric stacks with polySi and metal gates: Recent progress and current challenges.
IBM J. Res. Dev., 2006