Takeshi Inuo

According to our database, Takeshi Inuo authored at least 6 papers between 1998 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2006

An adaptive Viterbi decoder on the dynamically reconfigurable processor.

Shohei Abe, Yohei Hasegawa, Takao Toi, Takeshi Inuo, Hideharu Amano

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

2004

Techniques for Virtual Hardware on a Dynamically Reconfigurable Processor - An Approach to Tough Cases.

Hideharu Amano, Takeshi Inuo, Hirokazu Kami, Taro Fujii, Masayasu Suzuki

Proceedings of the Field Programmable Logic and Application, 2004

2001

Arithmetic Operation Oriented Reconfigurable Chip: RHW.

Tsukasa Yamauchi, Shogo Nakaya, Takeshi Inuo, Nobuki Kajihara

Proceedings of the Field-Programmable Logic and Applications, 2001

2000

Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW.

Tsukasa Yamauchi, Shogo Nakaya, Takeshi Inuo, Nobuki Kajihara

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1998

A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI.

Isamu Kajitani, Tsutomu Hoshino, Daisuke Nishikawa, Hiroshi Yokoi, Shogo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Masaya Iwata, Didier Keymeulen, Tetsuya Higuchi

Proceedings of the Evolvable Systems: From Biology to Hardware, 1998

Evolvable Hardware Chip for High Precision Printer Image Compression.

Hidenori Sakanashi, Mehrdad Salami, Masaya Iwata, Shogo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Tetsuya Higuchi

Proceedings of the Fifteenth National Conference on Artificial Intelligence and Tenth Innovative Applications of Artificial Intelligence Conference, 1998