Talal Bonny

Orcid: 0000-0003-1111-0304

According to our database1, Talal Bonny authored at least 49 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A novel clock-glitch-attack-proof image encryption algorithm implemented on FPGA.
Multim. Tools Appl., 2024

A New Hyperjerk System With a Half Line Equilibrium: Multistability, Period Doubling Reversals, Antimonotonocity, Electronic Circuit, FPGA Design, and an Application to Image Encryption.
IEEE Access, 2024

2023
Genetic Algorithm Augmented Inception-Net based Image Classifier Accelerated on FPGA.
Multim. Tools Appl., December, 2023

Speed and Accuracy Trade-off ANN/SVM Based Sleep Apnea Detection with FPGA Implementation.
Comput. methods Biomech. Biomed. Eng. Imaging Vis., November, 2023

Highly-secured chaos-based communication system using cascaded masking technique and adaptive synchronization.
Multim. Tools Appl., September, 2023

Voice encryption using a unified hyper-chaotic system.
Multim. Tools Appl., 2023

Multi-modal image classification of COVID-19 cases using computed tomography and X-rays scans.
Intell. Syst. Appl., 2023

FPGA-based parallel implementation to classify Hyperspectral images by using a Convolutional Neural Network.
Integr., 2023

Multistability and Bifurcation Analysis of a Novel 3D Jerk System: Electronic Circuit Design, FPGA Implementation, and Image Cryptography Scheme.
IEEE Access, 2023

Parameter Estimation of PRRR Robotic Arm Using Dandelion Technique.
Proceedings of the 6th IEEE International Conference on Knowledge Innovation and Invention, 2023

AI-Based Sign Language Interpreter (GestPret).
Proceedings of the 2023 7th International Conference on Advances in Artificial Intelligence, 2023

2022
Highly optimized Q-learning-based bees approach for mobile robot path planning in static and dynamic environments.
J. Field Robotics, 2022

A Novel 3D Chaotic System With Line Equilibrium: Multistability, Integral Sliding Mode Control, Electronic Circuit, FPGA Implementation and Its Image Encryption.
IEEE Access, 2022

2021
Chaotic or Hyper-chaotic Oscillator? Numerical Solution, Circuit Design, MATLAB HDL-Coder Implementation, VHDL Code, Security Analysis, and FPGA Realization.
Circuits Syst. Signal Process., 2021

Detection of Epileptic Seizure using Discrete Wavelet Transform on Gamma band and Artificial Neural Network.
Proceedings of the 14th International Conference on Developments in eSystems Engineering, 2021

Hypertension Classification Using Machine Learning Part II.
Proceedings of the 14th International Conference on Developments in eSystems Engineering, 2021

Hypertension Classification using Machine Learning - Part I.
Proceedings of the 14th International Conference on Developments in eSystems Engineering, 2021

Sleep Apnea Detecting and Monitoring System(SADMS).
Proceedings of the 14th International Conference on Developments in eSystems Engineering, 2021

2020
Emulation of high-performance correlation-based quantum clustering algorithm for two-dimensional data on FPGA.
Quantum Inf. Process., 2020

Toward a Unified Performance Metric for Benchmarking Steganography Systems.
J. Circuits Syst. Comput., 2020

A New Chaos-Based Cryptoystem for Voice Encryption.
Proceedings of the 3rd International Conference on Signal Processing and Information Security, 2020

Image Encryption Based on Chua Chaotic Oscillator.
Proceedings of the 3rd International Conference on Signal Processing and Information Security, 2020

Genetic Algorithm Augmented Convolutional Neural Network for Image Recognition Applications.
Proceedings of the International Conference on Communications, 2020

Exploring Quantization-Aware Training on a Convolution Neural Network.
Proceedings of the International Conference on Communications, 2020

2019
SHORT: Segmented histogram technique for robust real-time object recognition.
Multim. Tools Appl., 2019

Time Efficient Segmented Technique for Dynamic Programming Based Algorithms with FPGA Implementation.
J. Circuits Syst. Comput., 2019

Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators.
Circuits Syst. Signal Process., 2019

FPGA Reconfigurable UWB CPW Bow-Tie Aperture Antenna for Wi-Fi Applications (4.9 GHz) by Rotating Slots.
Proceedings of the International Conference on Communications, 2019

IoV Road Safety: Vehicle Speed Limiting System.
Proceedings of the International Conference on Communications, 2019

Smart Assistant for Blind and Visually Impaired People.
Proceedings of the 3rd International Conference on Advances in Artificial Intelligence, 2019

2018
Multiple histogram-based face recognition with high speed FPGA implementation.
Multim. Tools Appl., 2018

Image Edge Detectors under Different Noise Levels with FPGA Implementations.
J. Circuits Syst. Comput., 2018

2016
An Algorithm for Inferring Big Data Objects Correlation Using Word Net.
Proceedings of the 7th International Conference on Ambient Systems, 2016

2015
Filtering technique for high speed database sequence comparison.
Proceedings of the 9th IEEE International Conference on Semantic Computing, 2015

High Speed Database Sequence Comparison.
Proceedings of the 2015 International Conference on Soft Computing and Software Engineering, 2015

Computation Time Reduction to Speed-up the Database Searching Process.
Proceedings of the 2015 IEEE International Symposium on Multiple-Valued Logic, 2015

2014
High-speed enoding/decoding technique for reliable data transmission in wireless sensor networks.
Proceedings of the Eleventh Annual IEEE International Conference on Sensing, 2014

2011
High performance technique for database applicationsusing a hybrid GPU/CPU platform.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

ABS: Sequence alignment by scanning.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011

Fast global sequence alignment technique.
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011

2010
Huffman-based code compression techniques for embedded systems.
PhD thesis, 2010

Huffman-based code compression techniques for embedded processors.
ACM Trans. Design Autom. Electr. Syst., 2010

2009
LICT: left-uncompressed instructions compression technique to improve the decoding performance of VLIW processors.
Proceedings of the 46th Design Automation Conference, 2009

2008
Efficient Code Compression for Embedded Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2008

FBT: filled buffer technique to reduce code size for VLIW processors.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Instruction Re-encoding Facilitating Dense Embedded Code.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
Efficient code density through look-up table compression.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Instruction Splitting for Efficient Code Compression.
Proceedings of the 44th Design Automation Conference, 2007

2006
Using Lin-Kernighan algorithm for look-up table compression to improve code density.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006


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