Taro Niiyama

According to our database, Taro Niiyama authored at least 7 papers between 2008 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2018

Parameterized Mapping Distances for Semi-Structured Data.

Kilho Shin, Taro Niiyama

Proceedings of the Agents and Artificial Intelligence - 10th International Conference, 2018

The Mapping Distance - a Generalization of the Edit Distance - and its Application to Trees.

Kilho Shin, Taro Niiyama

Proceedings of the 10th International Conference on Agents and Artificial Intelligence, 2018

2010

Difficulty of Power Supply Voltage Scaling in Large Scale Subthreshold Logic Circuits.

Tadashi Yasufuku, Taro Niiyama, Piao Zhe, Koichi Ishida, Masami Murakata, Makoto Takamiya, Takayasu Sakurai

IEICE Trans. Electron., 2010

2008

Dependence of Minimum Operating Voltage (VDDmin) on Block Size of 90-nm CMOS Ring Oscillators and its Implications in Low Power DFM.

Taro Niiyama, Piao Zhe, Koichi Ishida, Masami Murakata, Makoto Takamiya, Takayasu Sakurai

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Increasing minimum operating voltage (V_DDmin) with number of CMOS logic gates and experimental verification with up to 1Mega-stage ring oscillators.

Taro Niiyama, Piao Zhe, Koichi Ishida, Masami Murakata, Makoto Takamiya, Takayasu Sakurai

Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

Expected vectorless Teacher-Student Swap (TSS) test method with dual power supply voltages for 0.3V homogeneous multi-core LSI's.

Taro Niiyama, Koichi Ishida, Makoto Takamiya, Takayasu Sakurai

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

1/5 power reduction by global optimization based on fine-grained body biasing.

Yasumi Nakamura, David Levacq, Limin Xiao, Takuya Minakawa, Taro Niiyama, Makoto Takamiya, Takayasu Sakurai

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008