Tarunesh Verma

According to our database, Tarunesh Verma authored at least 5 papers between 2021 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

These Aren't The Caches You're Looking For: Stochastic Channels on Randomized Caches.

Tarunesh Verma, Achilleas Anastasopoulos, Todd M. Austin

Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022

2021

ChipAdvisor: A Machine Learning Approach for Mapping Applications to Heterogeneous Systems.

Hiwot Tadese Kassa, Tarunesh Verma, Todd M. Austin, Valeria Bertacco

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads Using Hardware-Software Co-Design.

Nishil Talati, Kyle May, Armand Behroozi, Yichen Yang, Kuba Kaszyk, Christos Vasiladiotis, Tarunesh Verma, Lu Li, Brandon Nguyen, Jiawen Sun, John Magnus Morton, Agreen Ahmadi, Todd M. Austin, Michael F. P. O'Boyle, Scott A. Mahlke, Trevor N. Mudge, Ronald G. Dreslinski

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware.

Todd M. Austin, Austin Harris, Tarunesh Verma, Shijia Wei, Alex Kisil, Misiker Tadesse Aga, Valeria Bertacco, Baris Kasikci, Mohit Tiwari

Proceedings of the IEEE Hot Chips 33 Symposium, 2021

Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware.

Austin Harris, Tarunesh Verma, Shijia Wei, Lauren Biernacki, Alex Kisil, Misiker Tadesse Aga, Valeria Bertacco, Baris Kasikci, Mohit Tiwari, Todd M. Austin

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021