Toshihiro Sekiguchi

According to our database1, Toshihiro Sekiguchi authored at least 2 papers between 1996 and 2003.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2003
A 1-Gb/s/pin 512-Mb DDRII SDRAM using a digital DLL and a slew-rate-controlled output buffer.
IEEE J. Solid State Circuits, 2003

1996
A 29-ns 64-Mb DRAM with hierarchical array architecture.
IEEE J. Solid State Circuits, 1996


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