Tsutomu Maruyama

According to our database1, Tsutomu Maruyama authored at least 109 papers between 1984 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2018
Real-Time Stereo Vision System: A Multi-Block Matching on GPU.
IEEE Access, 2018

Fast convolution kernels on pascal GPU with high memory efficiency.
Proceedings of the High Performance Computing Symposium, 2018

An FPGA Implementation of Robust Matting.
Proceedings of the International Conference on Field-Programmable Technology, 2018

FPGA Acceleration of a Supervised Learning Method for Hyperspectral Image Classification.
Proceedings of the International Conference on Field-Programmable Technology, 2018

Real-Time High-Quality Stereo Matching System on a GPU.
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018

Programmable Logic Devices (PLDs) in Practical Applications.
Proceedings of the Principles and Structures of FPGAs., 2018

2017
A Fast and Accurate FPGA System for Short Read Mapping Based on Parallel Comparison on Hash Table.
IEICE Transactions, 2017

An Approach for Solving SAT/MaxSAT-Encoded Formal Verification Problems on FPGA.
IEICE Transactions, 2017

FPGA Hardware Acceleration of a Phylogenetic Tree Reconstruction with Maximum Parsimony Algorithm.
IEICE Transactions, 2017

An implementation method of poisson image editing on FPGA.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

An FPGA hardware implementation approach for a phylogenetic tree reconstruction algorithm with incremental tree optimization.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
An implementation method of the box filter on FPGA.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015
Real-time color image segmentation based on mean shift algorithm using an FPGA.
J. Real-Time Image Processing, 2015

FPGA Acceleration of SAT Preprocessor.
Proceedings of the Parallel Computing: On the Road to Exascale, 2015

A variable length hash method for faster short read mapping on FPGA.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

An FPGA implementation of a phylogenetic tree reconstruction algorithm using an alternative second-pass optimization.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014
Fast and Accurate Stereo Vision System on FPGA.
TRETS, 2014

GPU and FPGA Acceleration of Level Set Method.
SIGARCH Computer Architecture News, 2014

Fast and Accurate Optical Flow Estimation using FPGA.
SIGARCH Computer Architecture News, 2014

Annotation technology progress and evaluation for more accurate operations in global network environment.
Proceedings of the 2014 IEEE Network Operations and Management Symposium, 2014

FPGA acceleration of short read mapping based on sort and parallel comparison.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

FPGA acceleration of SAT/Max-SAT solving using variable-way cache.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

An FPGA hardware acceleration of the indirect calculation of tree lengths method for phylogenetic tree reconstruction.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

FPGA Implementation of Optical Flow Algorithm Based on Cost Aggregation.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

2013
An Image Filter System based on dynamic partial reconfiguration on FPGA.
Proceedings of the Parallel Computing: Accelerating Computational Science and Engineering (CSE), 2013

Interactive Graph Cuts using FPGA.
Proceedings of the Parallel Computing: Accelerating Computational Science and Engineering (CSE), 2013

An acceleration method of short read mapping using FPGA.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

A hardware acceleration of a phylogenetic tree reconstruction with maximum parsimony algorithm using FPGA.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

2012
FPGA acceleration of CDO pricing based on correlation expansions.
SIGARCH Computer Architecture News, 2012

An FPGA acceleration of a level set segmentation method.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

A region merging approach for image segmentation on FPGA.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

An acceleration of a graph cut segmentation with FPGA.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

A fast and high quality stereo matching algorithm on FPGA.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Real-time corner and polygon detection system on FPGA.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

A real-time stereo vision system using a tree-structured dynamic programming on FPGA.
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011
Accelerating HMMER search using FPGA Grid.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

Variable and clause elimination in SAT problems using an FPGA.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

An Implementation of the Mean Shift Filter on FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

An FPGA Solver for SAT-Encoded Formal Verification Problems.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010
An Approach for Solving Large SAT Problems on FPGA.
TRETS, 2010

Max-plus algebra-based wavelet transforms and their FPGA implementation for image coding.
Inf. Sci., 2010

Real-time detection of line segments on FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2010

An FPGA implementation of full-search variable block size motion estimation.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Detecting Patterns in Various Size and Angle Using FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Sum of Absolute Difference Implementations for Image Processing on FPGAs.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Real-Time Processing of Contrast Limited Adaptive Histogram Equalization on FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009
Accelerating HMMER search using FPGA.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Real-time processing of local contrast enhancement on FPGA.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Performance comparison of FPGA, GPU and CPU in image processing.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008
An implementation of a watershed algorithm based on connected components on FPGA.
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

An approach for downscaling images for real-time pattern detection.
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

How fast is an FPGA in image processing?
Proceedings of the FPL 2008, 2008

2007
Mesoscopic-level Simulation of Dynamics and Interactions of Biological Molecules Using Monte Carlo Simulation.
VLSI Signal Processing, 2007

Real-time image segmentation based on a parallel and pipelined watershed algorithm.
J. Real-Time Image Processing, 2007

An FPGA implementation of real-time K-means clustering for color images.
J. Real-Time Image Processing, 2007

Multiple Sequence Alignment Based on Dynamic Programming Using FPGA.
IEICE Transactions, 2007

A Lattice Gas Cellular Automata Simulator on the Cell Broadband Engine.
Proceedings of the Parallel Computing: Architectures, 2007

Real-Time Segmentation of Color Images based on the K-means Clustering on FPGA.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

An Approach for Applying Large Filters on Large Images using FPGA.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

High speed tablation system using an FPGA designed for distribution tables of frequent DNA subsequences.
Proceedings of the FPL 2007, 2007

A Pipeline Implementation of a Watershed Algorithm on FPGA.
Proceedings of the FPL 2007, 2007

An FPGA Implementation of Multiple Sequence Alignment Based on Carrillo-Lipman Method.
Proceedings of the FPL 2007, 2007

An FPGA Solver for Very Large SAT Problems.
Proceedings of the FPL 2007, 2007

An Acceleration Method for Evolutionary Systems Based on Iterated Prisoner's Dilemma.
Proceedings of the Reconfigurable Computing: Architectures, 2007

2006
Real-time K-Means Clustering for Color Images on Reconfigurable Hardware.
Proceedings of the 18th International Conference on Pattern Recognition (ICPR 2006), 2006

Implementation of a Parallel and Pipelined Watershed Algorithm on FPGA.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

An FPGA Implementation of K-Means Clustering for Color Images Based on Kd-Tree.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

An FPGA Solver for Large SAT Problems.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Multidimensional Dynamic Programming for Homology Search on Distributed Systems.
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006

2005
High Speed Computation of the Optical Flow.
Proceedings of the Image Analysis and Processing, 2005

A Compact System for Real-Time Detection of Line Segments.
Proceedings of the Image Analysis and Processing, 2005

Spatiotemporal Simulation of a Single Living Cell.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

Real-time Generation of Three-Dimensional Motion Fields.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Multidimensional Dynamic Programming for Homology Search.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

An FPGA Solver for WSAT Algorithms.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
An Operation Support System Architecture and Process for Optical Access Network Allocation during Service Provisioning.
J. Network Syst. Manage., 2004

Real-time detection of line segments using the line Hough transform.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

A tsume-shogi processor based on reconfigurable hardware.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

Three-Dimensional Dynamic Programming for Homology Search.
Proceedings of the Field Programmable Logic and Application, 2004

Real-Time Detection of Moving Objects.
Proceedings of the Field Programmable Logic and Application, 2004

Real-Time Computation of the Generalized Hough Transform.
Proceedings of the Field Programmable Logic and Application, 2004

2003
A Real-Time Stereo Vision System with FPGA.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

A High Speed Computation System for 3D FCHC Lattice Gas Model with FPGA.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

A Real-Time Visualization System for PIV.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002
High Speed Homology Search with FPGAs.
Proceedings of the 7th Pacific Symposium on Biocomputing, 2002

An operation support system architecture for network provisioning of optical access networks.
Proceedings of the Management Solutions for the New Communications World, 2002

An FPGA-based processor for shogi mating problems.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

High Speed Homology Search Using Run-Time Reconfiguration.
Proceedings of the Field-Programmable Logic and Applications, 2002

A Placement/Routing Approach for FPGA Accelerators.
Proceedings of the Field-Programmable Logic and Applications, 2002

High Speed Computation of Three Dimensional Cellular Automata with FPGA.
Proceedings of the Field-Programmable Logic and Applications, 2002

2001
A Music Synthesizer on FPGA.
Proceedings of the Field-Programmable Logic and Applications, 2001

An Approach to Real-Time Visualization of PIV Method with FPGA.
Proceedings of the Field-Programmable Logic and Applications, 2001

An Approach for Automatic Data Allocation in C to HDL Compilers.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

A Cellular Automata System with FPGA.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000
A Co-processor System with a Virtex FPGA for Evolutionary Computation.
Proceedings of the Field-Programmable Logic and Applications, 2000

High Speed Computation of Lattice gas Automata with FPFA.
Proceedings of the Field-Programmable Logic and Applications, 2000

A C to HDL Compiler for Pipeline Processing on FPGAs.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

A Shogi Processor with a Field Programmable Gate Array.
Proceedings of the Computers and Games, Second International Conference, 2000

1999
Hardware Implementation Techniques for Recursive Calls and Loops.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

A Reconfigurable Architecture for High Speed Computation by Pipeline Processing.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

High Speed Hardware Computation of Co-evolution Models.
Proceedings of the Advances in Artificial Life, 5th European Conference, 1999

1998
A Field-Programmable Gate-Array System for Evolutionary Computation.
Proceedings of the Field-Programmable Logic and Applications, 1998

1995
Architecture of a parallel machine: Cenju-3.
Systems and Computers in Japan, 1995

1993
A Fine-Grained Parallel Genetic Algorithm for Distributed Parallel Systems.
Proceedings of the 5th International Conference on Genetic Algorithms, 1993

1992
An Asynchronous Fine-Grained Parallel Genetic Algorithm.
Proceedings of the Parallel Problem Solving from Nature 2, 1992

Implementing Streams on Parallel Machines with Distributed Memory.
Proceedings of the International Conference on Fifth Generation Computer Systems. FGCS 1992, 1992

1987
A Preliminary Evaluation of a Parallel Inference Machine for Stream Parallel Languages.
Proceedings of the Logic Programming '87, 1987

1985
A Note on the Elementary Execution Unit in a Parallel Inference Machine.
Proceedings of the Logic Programming '85, 1985

1984
The Architecture of a Parallel Inference Engine - PIE.
Proceedings of the International Conference on Fifth Generation Computer Systems, 1984


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