Ivan Siu-Chuang Lu
According to our database1,
Ivan Siu-Chuang Lu
authored at least 9 papers
between 2005 and 2022.
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Bibliography
2022
A 5G FR2 Power-Amplifier With an Integrated Power-Detector for Closed-Loop EIRP Control.
IEEE J. Solid State Circuits, 2022
A 16-Channel, 28/39GHz Dual-Polarized 5G FR2 Phased-Array Transceiver IC with a Quad-Stream IF Transceiver Supporting Non-Contiguous Carrier Aggregation up to 1.6GHz BW.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2019
A 28-nm 75-fs<sub>rms</sub> Analog Fractional- $N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction.
IEEE J. Solid State Circuits, 2019
2017
13.3 A SAW-less reconfigurable multimode transmitter with a voltage-mode harmonic-reject mixer in 14nm FinFET CMOS.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2011
IEEE J. Solid State Circuits, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
2006
ADC Precision Requirement for Digital Ultra-Wideband Receivers with Sublinear Front-Ends: A Power and Performance Perspective.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
2005
The effect of receiver front-end non-linearity on DS-UWB systems operating in the 3 to 4 GHz band.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2005