Vassil S. Dimitrov

According to our database1, Vassil S. Dimitrov authored at least 80 papers between 1992 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
A Low-SWaP 16-Beam 2.4 GHz Digital Phased Array Receiver Using DFT Approximation.
IEEE Trans. Aerosp. Electron. Syst., 2020

Low-complexity Architecture for AR(1) Inference.
CoRR, 2020

2018
Efficient Computation of the 8-point DCT via Summation by Parts.
J. Signal Process. Syst., 2018

Computation of 2D 8×8 DCT Based on the Loeffler Factorization Using Algebraic Integer Encoding.
IEEE Trans. Computers, 2018

Efficient computation of tridiagonal matrices largest eigenvalue.
J. Comput. Appl. Math., 2018

Fast matrix inversion and determinant computation for Polarimetric Synthetic Aperture Radar.
Comput. Geosci., 2018

2017
DFT Computation Using Gauss-Eisenstein Basis: FFT Algorithms and VLSI Architectures.
IEEE Trans. Computers, 2017

A Single-Channel Architecture for Algebraic Integer Based 8×8 2-D DCT Computation.
CoRR, 2017

On the Computation of Neumann Series.
CoRR, 2017

Fast estimation of tridiagonal matrices largest eigenvalue.
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017

A Parallel Method for the Computation of Matrix Exponential Based on Truncated Neumann Series.
Proceedings of the 24th IEEE Symposium on Computer Arithmetic, 2017

2016
Error-free computation of 8-point discrete cosine transform based on the Loeffler factorisation and algebraic integers.
IET Signal Process., 2016

Alternative Implementations of Secure Real Numbers.
IACR Cryptol. ePrint Arch., 2016

Detection of neovascularization near the optic disk due to diabetic retinopathy.
Proceedings of the 24th European Signal Processing Conference, 2016

2015
VLSI Computational Architectures for the Arithmetic Cosine Transform.
IEEE Trans. Computers, 2015

A Generalization of Addition Chains and Fast Inversions in Binary Fields.
IEEE Trans. Computers, 2015

Modular Hardware Architecture for Somewhat Homomorphic Function Evaluation.
IACR Cryptol. ePrint Arch., 2015

2014
Precise VLSI Architecture for AI Based 1-D/ 2-D Daub-6 Wavelet Filter Banks With Low Adder-Count.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Fast Inversion in ${\schmi{GF(2^m)}}$ with Normal Basis Using Hybrid-Double Multipliers.
IEEE Trans. Computers, 2014

Algebraic integer architecture with minimum adder count for the 2-D Daubechies 4-tap filters banks.
Multidimens. Syst. Signal Process., 2014

2013
A Single-Channel Architecture for Algebraic Integer-Based 8 × 8 2-D DCT Computation.
IEEE Trans. Circuits Syst. Video Technol., 2013

VLSI Architectures for the 4-Tap and 6-Tap 2-D Daubechies Wavelet Filters Using Algebraic Integers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Asynchronous Realization of Algebraic Integer-Based 2D DCT Using Achronix Speedster SPD60 FPGA.
J. Electr. Comput. Eng., 2013

Another Look at Inversions over Binary Fields.
Proceedings of the 21st IEEE Symposium on Computer Arithmetic, 2013

2012
A Row-Parallel 8 × 8 2-D DCT Architecture Using Algebraic Integer-Based Exact Computation.
IEEE Trans. Circuits Syst. Video Technol., 2012

A Fast Hardware Architecture for Integer to \tauNAF Conversion for Koblitz Curves.
IEEE Trans. Computers, 2012

Block-Parallel Systolic-Array Architecture for 2-d NTT-Based Fragile Watermark Embedding.
Parallel Process. Lett., 2012

Error-free VLSI architecture for the 2-D Daubechies 4-tap filter using algebraic integers.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Experimental Comparison of Geometric, Arithmetic and Harmonic Means for EEG Event Related Potential Detection.
Proceedings of the Eighth International Conference on Computational Intelligence and Security, 2012

2011
Area-Efficient Multipliers Based on Multiple-Radix Representations.
IEEE Trans. Computers, 2011

Hybrid Binary-Ternary Number System for Elliptic Curve Cryptosystems.
IEEE Trans. Computers, 2011

Algebraic integer based 8×8 2-D DCT architecture for digital video processing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A new algorithm for double scalar multiplication over Koblitz curves.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
The arithmetic cosine transform: exact and approximate algorithms.
IEEE Trans. Signal Process., 2010

2009
Fragile watermarking using finite field trigonometrical transforms.
Signal Process. Image Commun., 2009

Hybrid Binary-Ternary Joint Form and Its Application in Elliptic Curve Cryptography.
Proceedings of the 19th IEEE Symposium on Computer Arithmetic, 2009

2008
Provably Sublinear Point Multiplication on Koblitz Curves and Its Hardware Implementation.
IEEE Trans. Computers, 2008

The double-base number system and its application to elliptic curve cryptography.
Math. Comput., 2008

Fast Multiple Point Multiplication on Elliptic Curves over Prime and Binary Fields using the Double-Base Number System.
IACR Cryptol. ePrint Arch., 2008

Hybrid Binary-Ternary Joint Sparse Form and its Application in Elliptic Curve Cryptography.
IACR Cryptol. ePrint Arch., 2008

A combinatorial interpretation of double base number system and some consequences.
Adv. Math. Commun., 2008

On the refinement of the DCT/IDCT scaling factor sensitivity.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008

2007
On the Error-Free Realization of a Scaled DCT Algorithm and Its VLSI Implementation.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

Efficient Quintuple Formulas for Elliptic Curves and Efficient Scalar Multiplication Using Multibase Number Representation.
IACR Cryptol. ePrint Arch., 2007

A Graph Theoretic Analysis of Double Base Number Systems.
Proceedings of the Progress in Cryptology, 2007

Multiplication by a Constant is Sublinear.
Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH-18 2007), 2007

2006
FPGA Implementation of Point Multiplication on Koblitz Curves Using Kleinian Integers.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2006

Extending Scalar Multiplication Using Double Bases.
Proceedings of the Advances in Cryptology, 2006

New Encoding of 8×8 DCT to make H.264 Lossless.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
An Efficient Architecture for a Lifted 2D Biorthogonal DWT.
J. VLSI Signal Process., 2005

Efficient Techniques for Binary-to-Multidigit Multidimensional Logarithmic Number System Conversion Using Range-Addressable Look-Up Tables.
IEEE Trans. Computers, 2005

Fast Elliptic Curve Point Multiplication using Double-Base Chains.
IACR Cryptol. ePrint Arch., 2005

A Low-Power Two-Digit Multi-dimensional Logarithmic Number System Filterbank Architecture for a Digital Hearing Aid.
EURASIP J. Adv. Signal Process., 2005

DBNS addition using cellular neural networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Efficient and Secure Elliptic Curve Point Multiplication Using Double-Base Chains.
Proceedings of the Advances in Cryptology, 2005

A Fault-Tolerant Modulus Replication Complex FIR Filter.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

Error-Free Computation of 8x8 2-D DCT and IDCT Using Two-Dimensional Algebraic Integer Quantization.
Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 2005

2004
Vlsi Architectures of Daubechies Wavelet Transforms Using Algebraic Integers.
J. Circuits Syst. Comput., 2004

A Programmable Base MDLNS MAC with Self-Generated Look-Up Table.
Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

A programmable base 2D-LNS MAC with self-generated look-up tables.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A low-power DCT IP core based on 2D algebraic integer encoding.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
Round-off error-free fixed-point design of polynomial FIR predictors and predictive FIR differentiators.
Digit. Signal Process., 2003

The Application of 2D Algebraic Integer Encoding to a DCT IP Core.
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

A 2-D LNS FIR Filter with a Programmable Second Base Using DRAMs.
Proceedings of the First Workshop on Embedded Systems for Real-Time Multimedia, 2003

Error-Free Arithmetic for Discrete Wavelet Transforms Using Algebraic Integers.
Proceedings of the 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 2003

2002
An analysis of Daubechies discrete wavelet transform based on algebraic integer encoding scheme.
Proceedings of the Third International Workshop on Digital and Computational Video, 2002

Efficient Conversion From Binary to Multi-Digit Multi-Dimensional Logarithmic Number Systems Using Arrays of Range Addressable Look-Up Tables.
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002

2001
An efficient technique for error-free algebraic-integer encoding for high performance implementation of the DCT and IDCT.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

The Use of the Multi-Dimensional Logarithmic Number System in DSP Applications.
Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 2001

2000
Complexity and Fast Algorithms for Multiexponentiations.
IEEE Trans. Computers, 2000

1999
Theory and Applications of the Double-Base Number System.
IEEE Trans. Computers, 1999

A hybrid DBNS processor for DSP computation.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998
A residue number system implementation of real orthogonal transforms.
IEEE Trans. Signal Process., 1998

Digital Arithmetic Using Analog Cellular Neural Networks.
J. Circuits Syst. Comput., 1998

An Algorithm for Modular Exponentiation.
Inf. Process. Lett., 1998

A new DCT algorithm based on encoding algebraic integers.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

Digital Arithmetic Using Analog Arrays.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998

1997
Algorithms for Multi-Exponentiation Based on Complex Arithmetic.
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997

1994
Hybrid Algorithm for the Computation of the Matrix Polynomial using a Fractal Number System.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1992
On the Multiplication of Reduced Biquaternions and Applications.
Inf. Process. Lett., 1992


  Loading...