Venkatraman Ramakrishnan

According to our database1, Venkatraman Ramakrishnan authored at least 4 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Switching Activity Factor-Based ECSM Characterization (SAFE): A Novel Technique for Aging-Aware Static Timing Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024

2023
Aging-Aware Timing Model of CMOS Inverter: Path Level Timing Performance and Its Impact on the Logical Effort.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

Beyond SPICE Simulation: A Novel Variability-Aware STA Methodology for Digital Timing Closure.
Proceedings of the 19th International Conference on Synthesis, 2023

2021
Variation Aware Timing Model of CMOS Inverter for an Efficient ECSM Characterization.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021


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