Ajoy Mandal

According to our database, Ajoy Mandal authored at least 13 papers between 2004 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Aging-Aware Timing Models for Reliability Enhancement of Inverter-Transmission Gate-Based Circuits.

Neha Gupta, Lomash Chandra Acharya, Khoirom Johnson Singh, Mahipal Dargupally, Neeraj Mishra, Arvind Kumar Sharma, Ajoy Mandal, Ramakrishnan Venkatraman, Sudeb Dasgupta, Anand Bulusu

IEEE Des. Test, June, 2026

2025

LiMo: A Framework Leveraging Machine Learning for Multi-Input Switching Timing Models of Complex Logic Gates.

Pooja Beniwal, Sneh Saurabh, N. Vignesh Chowdary, Suriya Skariah, Ajoy Mandal, Ramakrishnan Venkatraman

IEEE Trans. Circuits Syst. I Regul. Pap., December, 2025

Treading Towards Privacy-Preserving Table Structure Recognition.

Sachin Raja, Ajoy Mandal, C. V. Jawahar

Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2025

2024

Switching Activity Factor-Based ECSM Characterization (SAFE): A Novel Technique for Aging-Aware Static Timing Analysis.

Lomash Chandra Acharya, Arvind K. Sharma, Neeraj Mishra, Khoirom Johnson Singh, Mahipal Dargupally, Neha Gupta, Nayakanti Sai Shabarish, Ajoy Mandal, Ramakrishnan Venkatraman, Sudeb Dasgupta, Anand Bulusu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024

2023

Aging-Aware Timing Model of CMOS Inverter: Path Level Timing Performance and Its Impact on the Logical Effort.

Lomash Chandra Acharya, Arvind Kumar Sharma, Neeraj Mishra, Khoirom Johnson Singh, Mahipal Dargupally, Nayakanti Sai Shabarish, Ajoy Mandal, Ramakrishnan Venkatraman, Sudeb Dasgupta, Anand Bulusu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

Beyond SPICE Simulation: A Novel Variability-Aware STA Methodology for Digital Timing Closure.

Lomash Chandra Acharya, Anubhav Kumar, Khoirom Johnson Singh, Neha Gupta, Nayakanti Sai Shabarish, Neeraj Mishra, Mahipal Dargupally, Arvind Kumar Sharma, Ramakrishnan Venkatraman, Ajoy Mandal, Sudeb Dasgupta, Anand Bulusu

Proceedings of the 19th International Conference on Synthesis, 2023

2021

Variation Aware Timing Model of CMOS Inverter for an Efficient ECSM Characterization.

Lomash Chandra Acharya, Arvind Kumar Sharma, Ramakrishnan Venkatraman, Ajoy Mandal, Sudeb Dasgupta, Anand Bulusu

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Determination of Fat, SNF and Protein Content in Cow Milk from the Voltage Output of 'MilkTester'.

Suman Biswas, Ajoy Mandal, Moupali Chakraborty, Karabi Biswas

Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2021

2020

Optimal Choice of Waveform for Library Characterization for Accurate Delay Calculation.

Ajoy Mandal, Saili Shete

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

2018

Live Demonstration: Low Power Consuming Organic Field-Effect Transistors Based Flexible Temperature Sensor for Medical Applications.

Suman Mandal, Satyajit Roy, Ajoy Mandal, Arnab Ghosh, Biswarup Satpati, Madhuchanda Banerjee, Dipak Kumar Goswami

Proceedings of the 2018 IEEE SENSORS, New Delhi, India, October 28-31, 2018, 2018

2011

DFM: Impact analysis in a high performance design.

S. M. Stalin, Amit Brahme, Ramakrishnan Venkatraman, Ajoy Mandal

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2009

Optimization strategies to improve statistical timing.

Parimala Viswanath, Pranav Murthy, Debajit Das, R. Venkatraman, Ajoy Mandal, Arvind Veeravalli, H. Udayakumar

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2004

An Efficient Approach to Crosstalk Noise Analysis at Multiple Operating Modes.

Sreeram Chandrasekar, Sachin Shrivastava, Ajoy Mandal, Sornavalli Ramanathan

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004