Khoirom Johnson Singh

According to our database, Khoirom Johnson Singh authored at least 9 papers between 2021 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2026

Aging-Aware Timing Models for Reliability Enhancement of Inverter-Transmission Gate-Based Circuits.

Neha Gupta, Lomash Chandra Acharya, Khoirom Johnson Singh, Mahipal Dargupally, Neeraj Mishra, Arvind Kumar Sharma, Ajoy Mandal, Ramakrishnan Venkatraman, Sudeb Dasgupta, Anand Bulusu

IEEE Des. Test, June, 2026

2025

Aging Model Development for ASAP 7 nm Predictive PDK: Application in Aging-Aware Performance Prediction of Digital Logic and ADCs in Data Acquisition System.

Neha Gupta, Lomash Chandra Acharya, Mahipal Dargupally, Khoirom Johnson Singh, Amit Kumar Behera, Johan Euphrosine, Sudeb Dasgupta, Anand Bulusu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025

2024

Switching Activity Factor-Based ECSM Characterization (SAFE): A Novel Technique for Aging-Aware Static Timing Analysis.

Lomash Chandra Acharya, Arvind K. Sharma, Neeraj Mishra, Khoirom Johnson Singh, Mahipal Dargupally, Neha Gupta, Nayakanti Sai Shabarish, Ajoy Mandal, Ramakrishnan Venkatraman, Sudeb Dasgupta, Anand Bulusu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024

2023

Negative capacitance gate stack and Landau FET-based voltage amplifiers and circuits: Impact of ferroelectric thickness and domain variations.

Khoirom Johnson Singh, Lomash Chandra Acharya, Anand Bulusu, Sudeb Dasgupta

Microelectron. J., December, 2023

Aging-Aware Timing Model of CMOS Inverter: Path Level Timing Performance and Its Impact on the Logical Effort.

Lomash Chandra Acharya, Arvind Kumar Sharma, Neeraj Mishra, Khoirom Johnson Singh, Mahipal Dargupally, Nayakanti Sai Shabarish, Ajoy Mandal, Ramakrishnan Venkatraman, Sudeb Dasgupta, Anand Bulusu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

Beyond SPICE Simulation: A Novel Variability-Aware STA Methodology for Digital Timing Closure.

Lomash Chandra Acharya, Anubhav Kumar, Khoirom Johnson Singh, Neha Gupta, Nayakanti Sai Shabarish, Neeraj Mishra, Mahipal Dargupally, Arvind Kumar Sharma, Ramakrishnan Venkatraman, Ajoy Mandal, Sudeb Dasgupta, Anand Bulusu

Proceedings of the 19th International Conference on Synthesis, 2023

An Efficient Standard Cell Design Methodology by Exploiting Body Biasing and Poly Biasing in FDSOI for NTV Regime.

Mahipal Dargupally, Lomash Chandra Acharya, Khoirom Johnson Singh, Neha Gupta, Arvind K. Sharma, Sudeb Dasgupta, Anand Bulusu

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2022

Significance of Organic Ferroelectric in Harnessing Transient Negative Capacitance Effect at Low Voltage Over Oxide Ferroelectric.

Khoirom Johnson Singh, Lomash Chandra Acharya, Anand Bulusu, Sudeb Dasgupta

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Harnessing Maximum Negative Capacitance Signature Voltage Window in P(VDF-TrFE) Gate Stack.

Khoirom Johnson Singh, Anand Bulusu, Sudeb Dasgupta

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021