Khoirom Johnson Singh

According to our database, Khoirom Johnson Singh authored at least 5 papers between 2021 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2023

Negative capacitance gate stack and Landau FET-based voltage amplifiers and circuits: Impact of ferroelectric thickness and domain variations.

Khoirom Johnson Singh, Lomash Chandra Acharya, Anand Bulusu, Sudeb Dasgupta

Microelectron. J., December, 2023

Aging-Aware Timing Model of CMOS Inverter: Path Level Timing Performance and Its Impact on the Logical Effort.

Lomash Chandra Acharya, Arvind Kumar Sharma, Neeraj Mishra, Khoirom Johnson Singh, Mahipal Dargupally, Nayakanti Sai Shabarish, Ajoy Mandal, Venkatraman Ramakrishnan, Sudeb Dasgupta, Anand Bulusu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

Beyond SPICE Simulation: A Novel Variability-Aware STA Methodology for Digital Timing Closure.

Lomash Chandra Acharya, Anubhav Kumar, Khoirom Johnson Singh, Neha Gupta, Nayakanti Sai Shabarish, Neeraj Mishra, Mahipal Dargupally, Arvind Kumar Sharma, Venkatraman Ramakrishnan, Ajoy Mandal, Sudeb Dasgupta, Anand Bulusu

Proceedings of the 19th International Conference on Synthesis, 2023

2022

Significance of Organic Ferroelectric in Harnessing Transient Negative Capacitance Effect at Low Voltage Over Oxide Ferroelectric.

Khoirom Johnson Singh, Lomash Chandra Acharya, Anand Bulusu, Sudeb Dasgupta

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Harnessing Maximum Negative Capacitance Signature Voltage Window in P(VDF-TrFE) Gate Stack.

Khoirom Johnson Singh, Anand Bulusu, Sudeb Dasgupta

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021