Viktor Dubec

According to our database, Viktor Dubec authored at least 7 papers between 2003 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2009

Thermal imaging of smart power DMOS transistors in the thermally unstable regime using a compact transient interferometric mapping system.

Georg Haberfehlner, Sergey Bychikhin, Viktor Dubec, Michael Heer, A. Podgaynaya, M. Pfost, Matthias Stecher, Erich Gornik, Dionyz Pogany

Microelectron. Reliab., 2009

2007

Backside interferometric methods for localization of ESD-induced leakage current and metal shorts.

Viktor Dubec, Sergey Bychikhin, Dionyz Pogany, Erich Gornik, Tilo Brodbeck, Wolfgang Stadler

Microelectron. Reliab., 2007

2006

Analysis of triggering behaviour of high voltage CMOS LDMOS clamps and SCRs during ESD induced latch-up.

Michael Heer, Viktor Dubec, Sergey Bychikhin, Dionyz Pogany, Erich Gornik, M. Frank, A. Konrad, J. Schulz

Microelectron. Reliab., 2006

2005

Automated setup for thermal imaging and electrical degradation study of power DMOS devices.

Michael Heer, Viktor Dubec, M. Blaho, Sergey Bychikhin, Dionyz Pogany, Erich Gornik, Marie Denison, Matthias Stecher, Gerhard Groos

Microelectron. Reliab., 2005

2004

Multiple-time-instant 2D thermal mapping during a single ESD event.

Viktor Dubec, Sergey Bychikhin, M. Blaho, Michael Heer, Dionyz Pogany, Marie Denison, Nils Jensen, Matthias Stecher, Gerhard Groos, Erich Gornik

Microelectron. Reliab., 2004

Transient interferometric mapping of smart power SOI ESD protection devices under TLP and vf-TLP stress.

Sergey Bychikhin, Viktor Dubec, Dionyz Pogany, Erich Gornik, M. Graf, V. Dudek, Winfried Soppa

Microelectron. Reliab., 2004

2003

A dual-beam Michelson interferometer for investigation of trigger dynamics in ESD protection devices under very fast TLP stress.

Viktor Dubec, Sergey Bychikhin, M. Blaho, Dionyz Pogany, Erich Gornik, J. Willemen, Ning Qu, Wolfgang Wilkening, L. Zullino, A. Andreini

Microelectron. Reliab., 2003