Vincent Immler

Orcid: 0000-0002-1299-2823

According to our database1, Vincent Immler authored at least 21 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
High-Performance Design Patterns and File Formats for Side-Channel Analysis.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

2023
Analysis of Arbitrary Waveform Generation for Voltage Glitches.
Proceedings of the Workshop on Fault Detection and Tolerance in Cryptography, 2023

2020
Spatial Context Tree Weighting for Physical Unclonable Functions.
Proceedings of the European Conference on Circuit Theory and Design, 2020

2019
Higher-Order Alphabet Physical Unclonable Functions: Constructions, Properties, and Applications.
PhD thesis, 2019

New Insights to Key Derivation for Tamper-Evident Physical Unclonable Functions.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019

Secure Physical Enclosures from Covers with Tamper-Resistance.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019

Variable-Length Bit Mapping and Error-Correcting Codes for Higher-Order Alphabet PUFs - Extended Version.
J. Hardw. Syst. Secur., 2019

Side-Channel Analysis of the TERO PUF.
IACR Cryptol. ePrint Arch., 2019

2018
The Past, Present, and Future of Physical Security Enclosures: From Battery-Backed Monitoring to PUF-Based Inherent Security and Beyond.
J. Hardw. Syst. Secur., 2018

Your rails cannot hide from localized EM: how dual-rail logic fails on FPGAs - extended version.
J. Cryptogr. Eng., 2018

Capacitive Multi-Channel Security Sensor IC for Tamper-Resistant Enclosures.
Proceedings of the 2018 IEEE SENSORS, New Delhi, India, October 28-31, 2018, 2018

Dividing the threshold: Multi-probe localized EM analysis on threshold implementations.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

B-TREPID: Batteryless tamper-resistant envelope with a PUF and integrity detection.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

A measurement system for capacitive PUF-based security enclosures.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Efficient security zones implementation through hierarchical group key management at NoC-based MPSoCs.
Microprocess. Microsystems, 2017

Your Rails Cannot Hide From Localized EM: How Dual-Rail Logic Fails on FPGAs.
IACR Cryptol. ePrint Arch., 2017

Variable-Length Bit Mapping and Error-Correcting Codes for Higher-Order Alphabet PUFs.
IACR Cryptol. ePrint Arch., 2017

Take a moment and have some t: Hypothesis testing on raw PUF data.
Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

2016
Practical Aspects of Quantization and Tamper-Sensitivity for Physically Obfuscated Keys.
Proceedings of the Third Workshop on Cryptography and Security in Computing Systems, 2016

2014
Early Propagation and Imbalanced Routing, How to Diminish in FPGAs.
IACR Cryptol. ePrint Arch., 2014

2012
Breaking Hitag 2 Revisited.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2012


  Loading...