Violante Moschiano

According to our database1, Violante Moschiano authored at least 6 papers between 2010 and 2022.

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Bibliography

2022
A 1-Tb Density 4b/Cell 3D-NAND Flash on 176-Tier Technology with 4-Independent Planes for Read using CMOS-Under-the-Array.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021
Session 30 Overview: Non-Volatile Memories Memory Subcommittee.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2016

2014
19.1 A 128Gb MLC NAND-Flash device using 16nm planar cell.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013

2010
A 3bit/cell 32Gb NAND flash memory at 34nm with 6MB/s program throughput and with dynamic 2b/cell blocks configuration mode for a program throughput increase up to 13MB/s.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010


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