Vita Pi-Ho Hu
Orcid: 0000-0002-6216-214X
According to our database1,
Vita Pi-Ho Hu
authored at least 27 papers
between 2009 and 2023.
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Bibliography
2023
Proceedings of the International Conference on IC Design and Technology, 2023
2021
Monolithic 3D SRAM Cell with Stacked Two-Dimensional Materials Based FETs at 2nm Node.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Improved Energy Efficiency for Ferroelectric FET Non-Volatile Memory using Split-Gate Design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Device Designs and Analog Performance Analysis for Negative-Capacitance Vertical-Tunnel FET.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019
Improved Read Stability and Writability of Negative Capacitance FinFET SRAM Cell for Subthreshold Operation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2016
Investigation of BTI reliability for monolithic 3D 6T SRAM with ultra-thin-body GeOI MOSFETs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Evaluation of energy-efficient latch circuits with hybrid tunneling FET and FinFET devices for ultra-low-voltage applications.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Evaluation of TFET and FinFET devices and 32-Bit CLA circuits considering work function variation and line-edge roughness.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Evaluation of 32-Bit carry-look-ahead adder circuit with hybrid tunneling FET and FinFET devices.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
2014
Evaluation of Sub-0.2 V High-Speed Low-Power Circuits Using Hetero-Channel MOSFET and Tunneling FET Devices.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Single-trap-induced random telegraph noise for FinFET, Si/Ge Nanowire FET, Tunnel FET, SRAM and logic circuits.
Microelectron. Reliab., 2014
Evaluation of Stability, Performance of Ultra-Low Voltage MOSFET, TFET, and Mixed TFET-MOSFET SRAM Cell With Write-Assist Circuits.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Investigation and optimization of monolithic 3D logic circuits and SRAM cells considering interlayer coupling.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Device design and analysis of logic circuits and SRAMs for Germanium FinFETs on SOI and bulk substrates.
Proceedings of the International Symposium on Quality Electronic Design, 2013
Impacts of single trap induced random telegraph noise on Si and Ge nanowire FETs, 6T SRAM cells and logic circuits.
Proceedings of 2013 International Conference on IC Design & Technology, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
Impacts of random telegraph noise on the analog properties of FinFET and trigate devices and Widlar current source.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012
Stability and performance optimization of InGaAs-OI and GeOI hetero-channel SRAM cells.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
A comparative analysis of tunneling FET circuit switching characteristics and SRAM stability and performance.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
A comprehensive comparative analysis of FinFET and Trigate device, SRAM and logic circuits.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2011
Analysis of Ultra-Thin-Body SOI Subthreshold SRAM Considering Line-Edge Roughness, Work Function Variation, and Temperature Sensitivity.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009