Wade L. Williams

According to our database1, Wade L. Williams authored at least 2 papers between 2007 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2009
Loopback architecture for wafer-level at-speed testing of embedded HyperTransport<sup>TM</sup> processor links.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2007
Low Latency Clock Domain Transfer for Simultaneously Mesochronous, Plesiochronous and Heterochronous Interfaces.
Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007


  Loading...