Chad O. Lackey

According to our database, Chad O. Lackey authored at least 2 papers between 2009 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

Extending HyperTransport™ technology to 8.0 Gb/s in 32-nm SOI-CMOS processors.

Bruce Andrew Doyle, Alvin Leng Sun Loke, Sanjeev K. Maheshwari, Charles Lin Wang, Dennis Michael Fischette, Jeffrey G. Cooper, Sanjeev K. Aggarwal, Tin Tin Wee, Chad O. Lackey, Harishkumar S. Kedarnath, Michael M. Oshima, Gerry R. Talbot, Emerson S. Fang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2009

Loopback architecture for wafer-level at-speed testing of embedded HyperTransport^TM processor links.

Alvin Leng Sun Loke, Bruce Andrew Doyle, Michael M. Oshima, Wade L. Williams, Robert G. Lewis, Charles Lin Wang, Audie Hanpachern, Karen M. Tucker, Prashanth Gurunath, Gladney C. Asada, Chad O. Lackey, Tin Tin Wee, Emerson S. Fang

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009