Wei-Hsiang Ma

According to our database, Wei-Hsiang Ma authored at least 6 papers between 2008 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Energy-Efficient Low-Latency 600 MHz FIR With High-Overdrive Charge-Recovery Logic.

Jerry C. Kao, Wei-Hsiang Ma, Visvesh S. Sathe, Marios C. Papaefthymiou

IEEE Trans. Very Large Scale Integr. Syst., 2012

2011

A 5.5GS/s 28mW 5-bit flash ADC with resonant clock distribution.

Wei-Hsiang Ma, Jerry C. Kao, Marios C. Papaefthymiou

Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010

187 MHz Subthreshold-Supply Charge-Recovery FIR.

Wei-Hsiang Ma, Jerry C. Kao, Visvesh S. Sathe, Marios C. Papaefthymiou

IEEE J. Solid State Circuits, 2010

2009

RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance.

Shidhartha Das, Carlos Tokunaga, Sanjay Pant, Wei-Hsiang Ma, Sudherssen Kalaiselvan, Kevin Lai, David M. Bull, David T. Blaauw

IEEE J. Solid State Circuits, 2009

A charge-recovery 600MHz FIR filter with 1.5-cycle latency overhead.

Jerry C. Kao, Wei-Hsiang Ma, Visvesh S. Sathe, Marios C. Papaefthymiou

Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008

Razor II: In Situ Error Detection and Correction for PVT and SER Tolerance.

David T. Blaauw, Sudherssen Kalaiselvan, Kevin Lai, Wei-Hsiang Ma, Sanjay Pant, Carlos Tokunaga, Shidhartha Das, David M. Bull

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008