Xiaowei Wang

According to our database, Xiaowei Wang authored at least 12 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Eidetic: An In-Memory Matrix Multiplication Accelerator for Neural Networks.

Charles Eckert, Arun Subramaniyan, Xiaowei Wang, Charles Augustine, Ravishankar Iyer, Reetuparna Das

IEEE Trans. Computers, June, 2023

2022

Efficient, Reconfigurable, and QoS-Aware Systems for Deep Neural Networks

Xiaowei Wang

PhD thesis, 2022

2021

In-/Near-Memory Computing

Daichi Fujiki, Xiaowei Wang, Arun Subramaniyan, Reetuparna Das

Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01772-8, 2021

Cache Compression with Efficient in-SRAM Data Comparison.

Xiaowei Wang, Charles Augustine, Eriko Nurvitadhi, Ravi R. Iyer, Li Zhao, Reetuparna Das

Proceedings of the IEEE International Conference on Networking, Architecture and Storage, 2021

Compute-Capable Block RAMs for Efficient Deep Learning Acceleration on FPGAs.

Xiaowei Wang, Vidushi Goyal, Jiecao Yu, Valeria Bertacco, Andrew Boutros, Eriko Nurvitadhi, Charles Augustine, Ravi R. Iyer, Reetuparna Das

Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

2020

A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing.

Jingcheng Wang, Xiaowei Wang, Charles Eckert, Arun Subramaniyan, Reetuparna Das, David T. Blaauw, Dennis Sylvester

IEEE J. Solid State Circuits, 2020

Neksus: An Interconnect for Heterogeneous System-In-Package Architectures.

Vidushi Goyal, Xiaowei Wang, Valeria Bertacco, Reetuparna Das

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

High Throughput CNN Inference and Training with In-Cache Computation.

Xiaowei Wang, Li Zhao, Pengcheng Li

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

MARTINI: Memory Access Traces to Detect Attacks.

Yujun Qin, Samuel Gonzalez, Kevin Angstadt, Xiaowei Wang, Stephanie Forrest, Reetuparna Das, Kevin Leach, Westley Weimer

Proceedings of the CCSW'20, 2020

2019

A Compute SRAM with Bit-Serial Integer/Floating-Point Operations for Programmable In-Memory Vector Acceleration.

Jingcheng Wang, Xiaowei Wang, Charles Eckert, Arun Subramaniyan, Reetuparna Das, David T. Blaauw, Dennis Sylvester

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

Bit Prudent In-Cache Acceleration of Deep Convolutional Neural Networks.

Xiaowei Wang, Jiecao Yu, Charles Augustine, Ravi R. Iyer, Reetuparna Das

Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

2018

Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks.

Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan, Ravi R. Iyer, Dennis Sylvester, David T. Blaauw, Reetuparna Das

Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018