Xin Fu
Orcid: 0000-0002-9458-4769Affiliations:
- University of Houston, Department of Electrical and Computer Engineering, TX, USA
- University of Kansas, Department of Electrical Engineering and Computer Science, Lawrence, USA (2010-2014)
- University of Illinois at Urbana-Champaign, Department of Computer Science, IL, USA (2009-2010)
- University of Florida, Gainesville, FL, USA (PhD 2009)
According to our database1,
Xin Fu
authored at least 106 papers
between 2006 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on ece.uh.edu
-
on orcid.org
On csauthors.net:
Bibliography
2025
Fed MobiLLM: Efficient Federated LLM Fine-Tuning over Heterogeneous Mobile Devices via Server Assisted Side-Tuning.
CoRR, August, 2025
PAE MobiLLM: Privacy-Aware and Efficient LLM Fine-Tuning on the Mobile Device via Additive Side-Tuning.
CoRR, July, 2025
AR-Light: Enabling Fast and Lightweight Multi-User Augmented Reality via Semantic Segmentation and Collaborative View Synchronization.
IEEE Trans. Computers, June, 2025
NeuroMoE: A Transformer-Based Mixture-of-Experts Framework for Multi-Modal Neurological Disorder Classification.
CoRR, June, 2025
DAFL: Device-to-Device Transmissions for Delay-Efficient Federated Learning Over Mobile Devices.
IEEE Internet Things J., March, 2025
IEEE Trans. Computers, February, 2025
MobiLLM: Enabling LLM Fine-Tuning on the Mobile Device via Server Assisted Side Tuning.
CoRR, February, 2025
Generalized Transitional Markov Chain Monte Carlo Sampling Technique for Bayesian Inversion of Electromagnetic Data.
IEEE Trans. Geosci. Remote. Sens., 2025
NANI: Energy-efficient Neuron-Aware hardware Noise Injection for adversarial defense using undervolting.
J. Syst. Archit., 2025
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2025
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2025
MMDFL: Multi-Model-based Decentralized Federated Learning for Resource-Constrained AIoT Systems.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025
MoF-Image: Generating Mixture-of-Features Video Game Image Dataset via GPU Rendering Simulation.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2025
WHALE-FL: Wireless and Heterogeneity Aware Latency Efficient Federated Learning over Mobile Devices via Adaptive Subnetwork Scheduling.
Proceedings of the AAAI-25, Sponsored by the Association for the Advancement of Artificial Intelligence, February 25, 2025
Proceedings of the AAAI-25, Sponsored by the Association for the Advancement of Artificial Intelligence, February 25, 2025
2024
ACM Trans. Archit. Code Optim., December, 2024
Enhancing Neural Network Reliability: Insights From Hardware/Software Collaboration With Neuron Vulnerability Quantization.
IEEE Trans. Computers, August, 2024
Efficient one-shot Neural Architecture Search with progressive choice freezing evolutionary search.
Neurocomputing, 2024
HSAS: Efficient task scheduling for large scale heterogeneous systolic array accelerator cluster.
Future Gener. Comput. Syst., 2024
WHALE-FL: Wireless and Heterogeneity Aware Latency Efficient Federated Learning over Mobile Devices via Adaptive Subnetwork Scheduling.
CoRR, 2024
Safe Offline-to-Online Multi-Agent Decision Transformer: A Safety Conscious Sequence Modeling Approach.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 2024
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
Proceedings of the 2024 IEEE Global Communications Conference, 2024
2023
Enabling High-Efficient ReRAM-Based CNN Training Via Exploiting Crossbar-Level Insignificant Writing Elimination.
IEEE Trans. Computers, November, 2023
ACM Trans. Archit. Code Optim., September, 2023
Architectural Design Model Guided On-Demand Power Management of Energy-Efficient GPGPU for SLAM.
J. Circuits Syst. Comput., September, 2023
Accelerating Reinforcement Learning-Based CCSL Specification Synthesis Using Curiosity-Driven Exploration.
IEEE Trans. Computers, May, 2023
Energy and Reliability-Aware Task Scheduling for Cost Optimization of DVFS-Enabled Cloud Workflows.
IEEE Trans. Cloud Comput., 2023
IEEE Internet Things J., 2023
Saca-FI: A microarchitecture-level fault injection framework for reliability analysis of systolic array based CNN accelerator.
Future Gener. Comput. Syst., 2023
A Survey of AI-enabled Dynamic Manufacturing Scheduling: From Directed Heuristics to Autonomous Learning.
ACM Comput. Surv., 2023
CoRR, 2023
EEFL: High-Speed Wireless Communications Inspired Energy Efficient Federated Learning over Mobile Devices.
Proceedings of the 21st Annual International Conference on Mobile Systems, 2023
NAS-SE: Designing A Highly-Efficient In-Situ Neural Architecture Search Engine for Large-Scale Deployment.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Workie-Talkie: Accelerating Federated Learning by Overlapping Computing and Communications via Contrastive Regularization.
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023
Post0-VR: Enabling Universal Realistic Rendering for Modern VR via Exploiting Architectural Similarity and Data Sharing.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
DAFL: Delay Efficient Federated Learning over Mobile Devices via Device-to-Device Transmissions.
Proceedings of the IEEE Global Communications Conference, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
DynamAP: Architectural Support for Dynamic Graph Traversal on the Automata Processor.
ACM Trans. Archit. Code Optim., 2022
BS-pFL: Enabling Low-Cost Personalized Federated Learning by Exploring Weight Gradient Sparsity.
Proceedings of the International Joint Conference on Neural Networks, 2022
2021
A Collaborative and Sustainable Edge-Cloud Architecture for Object Tracking with Convolutional Siamese Networks.
IEEE Trans. Sustain. Comput., 2021
Enabling Highly Efficient Capsule Networks Processing Through Software-Hardware Co-Design.
IEEE Trans. Computers, 2021
CoRR, 2021
Shift-BNN: Highly-Efficient Probabilistic Bayesian Neural Network Training via Memory-Friendly Pattern Retrieving.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
η-LSTM: Co-Designing Highly-Efficient Large LSTM Training via Exploiting Memory-Saving and Architectural Design Opportunities.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
2020
Energy-Efficient GPU L2 Cache Design Using Instruction-Level Data Locality Similarity.
ACM Trans. Design Autom. Electr. Syst., 2020
Toward Customized Hybrid Fuel-Cell and Battery-powered Mobile Device for Individual Users.
ACM Trans. Embed. Comput. Syst., 2020
Statistical Model Checking-Based Evaluation and Optimization for Cloud Workflow Resource Allocation.
IEEE Trans. Cloud Comput., 2020
Enabling Energy-Efficient and Reliable Neural Network via Neuron-Level Voltage Scaling.
IEEE Trans. Computers, 2020
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Enabling Highly Efficient Capsule Networks Processing Through A PIM-Based Architecture Design.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
2019
Pervasive Mob. Comput., 2019
Improving energy efficiency of mobile devices by characterizing and exploring user behaviors.
J. Syst. Archit., 2019
OO-VR: NUMA friendly object-oriented VR rendering framework for future NUMA-based multi-GPU systems.
Proceedings of the 46th International Symposium on Computer Architecture, 2019
Enabling Energy-Efficient and Reliable Neural Network via Neuron-Level Voltage Scaling.
Proceedings of the 25th IEEE International Conference on Parallel and Distributed Systems, 2019
Reliability Enhancement of Neural Networks via Neuron-Level Vulnerability Quantization.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2019
Proceedings of the Algorithms and Architectures for Parallel Processing, 2019
PIM-VR: Erasing Motion Anomalies In Highly-Interactive Virtual Reality World with Customized Memory Cube.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018
2017
Dolphins First: Dolphin-Aware Communications in Multi-Hop Underwater Cognitive Acoustic Networks.
IEEE Trans. Wirel. Commun., 2017
Interspike-Interval-Based Analog Spike-Time-Dependent Encoder for Neuromorphic Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2017
On the Implication of NTC versus Dark Silicon on Emerging Scale-Out Workloads: The Multi-Core Architecture Perspective.
IEEE Trans. Parallel Distributed Syst., 2017
Efficient Resource Constrained Scheduling Using Parallel Two-Phase Branch-and-Bound Heuristics.
IEEE Trans. Parallel Distributed Syst., 2017
ACM Trans. Design Autom. Electr. Syst., 2017
Microprocess. Microsystems, 2017
J. Circuits Syst. Comput., 2017
J. Circuits Syst. Comput., 2017
Three dimensional memristor-based neuromorphic computing system and its application to cloud robotics.
Comput. Electr. Eng., 2017
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017
2016
IEEE Trans. Parallel Distributed Syst., 2016
Exploring Soft-Error Robust and Energy-Efficient Register File in GPGPUs using Resistive Memory.
ACM Trans. Design Autom. Electr. Syst., 2016
J. Supercomput., 2016
Efficient Resource Constrained Scheduling Using Parallel Structure-Aware Pruning Techniques.
IEEE Trans. Computers, 2016
Design space exploration for device and architectural heterogeneity in chip-multiprocessors.
Microprocess. Microsystems, 2016
FPGA based spike-time dependent encoder and reservoir design in neuromorphic computing processors.
Microprocess. Microsystems, 2016
Redefining QoS and customizing the power management policy to satisfy individual mobile users.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Proceedings of the 45th International Conference on Parallel Processing, 2016
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Characterizing, modeling, and improving the QoE of mobile devices with low battery level.
Proceedings of the 48th International Symposium on Microarchitecture, 2015
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium, 2015
Soft-error reliability and power co-optimization for GPGPUS register file using resistive memory.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Variation-aware evaluation of MPSoC task allocation and scheduling strategies using statistical model checking.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 22nd ACM SIGSAC Conference on Computer and Communications Security, 2015
2014
Design configuration selection for hard-error reliable processors via statistical rules.
Microprocess. Microsystems, 2014
2013
Parallel Comput., 2013
Proceedings of the International Symposium on Quality Electronic Design, 2013
Reliable Express-Virtual-Channel-based network-on-chip under the impact of technology scaling.
Proceedings of the International Symposium on Quality Electronic Design, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the Computing Frontiers Conference, 2013
2012
Proceedings of the 30th International IEEE Conference on Computer Design, 2012
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012
2011
Proceedings of the 2011 IEEE International Symposium on Workload Characterization, 2011
2010
Architecting reliable multi-core network-on-chip for small scale processing technology.
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010
2009
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009
2008
ORBIT: Effective Issue Queue Soft-Error Vulnerability Mitigation on Simultaneous Multithreaded Architectures Using Operand Readiness-Based Instruction Dispatch.
Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008
Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures.
Proceedings of the 2008 International Conference on Parallel Processing, 2008
Combined circuit and microarchitecture techniques for effective soft error robustness in SMT processors.
Proceedings of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2008
2007
An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007
2006
Proceedings of the 14th International Symposium on Modeling, 2006