Xizi Chen
Orcid: 0000-0001-8155-6606
According to our database1,
Xizi Chen authored at least 18 papers
between 2018 and 2026.
Collaborative distances:
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Bibliography
2026
IEEE Access, 2026
Exploiting the Irregular Input Sparsity in Systolic Array-based DNN Accelerators via Local Soft Pooling.
Proceedings of the 31st Asia and South Pacific Design Automation Conference, 2026
2025
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2025
MA-HybridBTS: Modality-Aware Multi-Scale Hybrid 3D Conv-Transformer for Brain Tumor Segmentation.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2025
2024
Partial Knowledge Distillation for Alleviating the Inherent Inter-Class Discrepancy in Federated Learning.
CoRR, 2024
Proceedings of the Benchmarking, Measuring, and Optimizing, 2024
2023
Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023
A 137.5 TOPS/W SRAM Compute-in-Memory Macro with 9-b Memory Cell-Embedded ADCs and Signal Margin Enhancement Techniques for AI Edge Applications.
CoRR, 2023
Proceedings of the VLSI-SoC 2023: Innovations for Trustworthy Artificial Intelligence, 2023
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023
Late Breaking Results: Weight Decay is ALL You Need for Neural Network Sparsification.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
A Reconfigurable Winograd CNN Accelerator with Nesting Decomposition Algorithm for Computing Convolution with Large Filters.
CoRR, 2021
2020
Tight Compression: Compressing CNN Model Tightly Through Unstructured Pruning and Simulated Annealing Based Permutation.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
SubMac: Exploiting the subword-based computation in RRAM-based CNN accelerator for energy saving and speedup.
Integr., 2019
CompRRAE: RRAM-based convolutional neural network accelerator with reduced computations through a runtime activation estimation.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
SparseNN: An energy-efficient neural network accelerator exploiting input and output sparsity.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
A high-throughput and energy-efficient RRAM-based convolutional neural network using data encoding and dynamic quantization.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018