Xuan Hu

Can Cui

Samuel Liu

Michael P. Frank

Neuromorph. Comput. Eng., June, 2023

Cascaded Logic Gates Based on High-Performance Ambipolar Dual-Gate WSe2 Thin Film Transistors.

[BibT_eX]

[DOI]

CoRR, 2023

Near-Landauer Reversible Skyrmion Logic with Voltage-Based Propagation.

[BibT_eX]

[DOI]

CoRR, 2023

2022

Logical and Physical Reversibility of Conservative Skyrmion Logic.

[BibT_eX]

[DOI]

Benjamin W. Walker

Peng Zhou

Alexandru Paler

Michael P. Frank

CoRR, 2022

Purely Spintronic Leaky Integrate-and-Fire Neurons.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Physically and Algorithmically Secure Logic Locking with Hybrid CMOS/Nanomagnet Logic Circuits.

[BibT_eX]

[DOI]

Dhritiman Bhattacharya

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

Hybrid Pass Transistor Logic With Ambipolar Transistors.

[BibT_eX]

[DOI]

Amy S. Abraham

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Karnaugh Map Method for Memristive and Spintronic Asymmetric Basis Logic Functions.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2021

High-Speed CMOS-Free Purely Spintronic Asynchronous Recurrent Neural Network.

[BibT_eX]

[DOI]

CoRR, 2021

Skyrmion Logic Clocked via Voltage Controlled Magnetic Anisotropy.

[BibT_eX]

[DOI]

Benjamin W. Walker

Can Cui

CoRR, 2021

Secure Logic Locking with Strain-Protected Nanomagnet Logic.

[BibT_eX]

[DOI]

Abraham Peedikayil Kuruvila

Dhritiman Bhattacharya

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

Domain Wall Leaky Integrate-and-Fire Neurons with Shape-Based Configurable Activation Functions.

[BibT_eX]

[DOI]

Can Cui

Alvaro Velasquez

CoRR, 2020

Threshold Logic with Current-Driven Magnetic Domain Walls.

[BibT_eX]

[DOI]

Brighton A. Hill

CoRR, 2020

Hybrid Pass Transistor Logic with Dual-Gate Ambipolar CNTFETs.

[BibT_eX]

[DOI]

CoRR, 2020

CMOS-Free Multilayer Perceptron Enabled by Four-Terminal MTJ Device.

[BibT_eX]

[DOI]

CoRR, 2020

Device Modeling and Circuit Design for Scalable Beyond-CMOS Computing.

[BibT_eX]

[DOI]

Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

Process Variation Model and Analysis for Domain Wall-Magnetic Tunnel Junction Logic.

[BibT_eX]

[DOI]

T. Patrick Xiao

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

CMOS-Free Magnetic Domain Wall Leaky Integrate-and-Fire Neurons with Intrinsic Lateral Inhibition.

[BibT_eX]

[DOI]

Otitoaleke G. Akinola

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Overhead Requirements for Stateful Memristor Logic.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Exploiting Dual-Gate Ambipolar CNFETs for Scalable Machine Learning Classification.

[BibT_eX]

[DOI]

Farid Kenarangi

Yihan Liu

Inna Partin-Vaisband

CoRR, 2019

Shape-based Magnetic Domain Wall Drift for an Artificial Spintronic Leaky Integrate-and-Fire Neuron.

[BibT_eX]

[DOI]

CoRR, 2019

2018

Conservative Skyrmion Logic System.

[BibT_eX]

[DOI]

Maverick Chauwin

Neilesh Betrabet

Christoforos Moutafis

CoRR, 2018

2017

Transient model with interchangeability for dual-gate ambipolar CNTFET logic design.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

Closed-form model for dual-gate ambipolar CNTFET circuit design.

[BibT_eX]

[DOI]