Christopher H. Bennett

Orcid: 0000-0002-6989-292X

According to our database1, Christopher H. Bennett authored at least 33 papers between 2015 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Magnetic skyrmions and domain walls for logical and neuromorphic computing.
Neuromorph. Comput. Eng., June, 2023

Enabling High-Speed, High-Resolution Space-based Focal Plane Arrays with Analog In-Memory Computing.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

TID Response of an Analog In-Memory Neural Network Accelerator.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

Statistical Characterization of ReRAM Arrays for Analog In-Memory Computing.
Proceedings of the IEEE International Conference on Rebooting Computing, 2023

2022
An Accurate, Error-Tolerant, and Energy-Efficient Neural Network Inference Engine Based on SONOS Analog Memory.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

An out-of-distribution discriminator based on Bayesian neural network epistemic uncertainty.
CoRR, 2022

Intrinsic Lateral Inhibition Facilitates Winner-Take-All in Domain Wall Racetrack Arrays for Neuromorphic Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Purely Spintronic Leaky Integrate-and-Fire Neurons.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Analog Neural Network Inference Accuracy in One-Selector One-Resistor Memory Arrays.
Proceedings of the IEEE International Conference on Rebooting Computing, 2022

2021
Shape-Dependent Multi-Weight Magnetic Artificial Synapses for Neuromorphic Computing.
CoRR, 2021

On the Accuracy of Analog Neural Network Inference Accelerators.
CoRR, 2021

High-Speed CMOS-Free Purely Spintronic Asynchronous Recurrent Neural Network.
CoRR, 2021

Controllable reset behavior in domain wall-magnetic tunnel junction artificial neurons for task-adaptable computation.
CoRR, 2021

An Analog Preconditioner for Solving Linear Systems.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020
Domain Wall Leaky Integrate-and-Fire Neurons with Shape-Based Configurable Activation Functions.
CoRR, 2020

Unsupervised Competitive Hardware Learning Rule for Spintronic Clustering Architecture.
CoRR, 2020

CMOS-Free Multilayer Perceptron Enabled by Four-Terminal MTJ Device.
CoRR, 2020

Evaluating complexity and resilience trade-offs in emerging memory inference machines.
Proceedings of the NICE '20: Neuro-inspired Computational Elements Workshop, 2020

Process Variation Model and Analysis for Domain Wall-Magnetic Tunnel Junction Logic.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

CMOS-Free Magnetic Domain Wall Leaky Integrate-and-Fire Neurons with Intrinsic Lateral Inhibition.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Plasticity-Enhanced Domain-Wall MTJ Neural Networks for Energy-Efficient Online Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Device-aware inference operations in SONOS nonvolatile memory arrays.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Redox transistors for neuromorphic computing.
IBM J. Res. Dev., 2019

Shape-based Magnetic Domain Wall Drift for an Artificial Spintronic Leaky Integrate-and-Fire Neuron.
CoRR, 2019

Contrasting Advantages of Learning With Random Weights and Backpropagation in Non-Volatile Memory Neural Networks.
IEEE Access, 2019

Wafer-Scale TaOx Device Variability and Implications for Neuromorphic Computing Applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

2018
Local learning with highly analog memory devices. (Apprentissage local avec des dispositifs de mémoire hautement analogiques).
PhD thesis, 2018

Multiscaled Simulation Methodology for Neuro-Inspired Circuits Demonstrated with an Organic Memristor.
IEEE Trans. Multi Scale Comput. Syst., 2018

2017
Spatio-temporal learning with arrays of analog nanosynapses.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

2016
Exploiting the Short-term to Long-term Plasticity Transition in Memristive Nanodevice Learning Architectures.
CoRR, 2016

Exploiting the short-term to long-term plasticity transition in memristive nanodevice learning architectures.
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016

A recurrent crossbar of memristive nanodevices implements online novelty detection.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016

2015
Supervised learning with organic memristor devices and prospects for neural crossbar arrays.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015


  Loading...