Yajun He

According to our database1, Yajun He authored at least 3 papers between 2017 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
A power scalable 2-10 Gb/s PI-based clock data recovery for multilane applications.
Microelectron. J., 2018

2017
A 40-80 Gb/s PAM4 wireline transmitter in 65nm CMOS technology.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

An 8.5-12.5GHz wideband LC PLL with dual VCO cores for multi-protocol SerDes.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017


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