Ying Liu

According to our database, Ying Liu authored at least 10 papers between 2021 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

13.1 A 0.22mm2 161nW Noise-Robust Voice-Activity Detection Using Information-Aware Data Compression and Neuromorphic Spatial-Temporal Feature Extraction.

Ying Liu, Jie Li, Qining Zhang, Tianhao Zhao, Chenhao Shi, Ninghui Shang, Peiyu Chen, Xiaohuan Ge, Yufei Ma, Linxiao Shen, Zhixuan Wang, Ru Huang, Le Ye

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024

Sparsity-Aware In-Memory Neuromorphic Computing Unit With Configurable Topology of Hybrid Spiking and Artificial Neural Network.

Ying Liu, Zhiyuan Chen, Wentao Zhao, Tianhao Zhao, Tianyu Jia, Zhixuan Wang, Ru Huang, Le Ye, Yufei Ma

IEEE Trans. Circuits Syst. I Regul. Pap., June, 2024

30.2 A 22nm 0.26nW/Synapse Spike-Driven Spiking Neural Network Processing Unit Using Time-Step-First Dataflow and Sparsity-Adaptive In-Memory Computing.

Ying Liu, Yufei Ma, Ninghui Shang, Tianhao Zhao, Peiyu Chen, Meng Wu, Jiayoon Ru, Tianyu Jia, Le Ye, Zhixuan Wang, Ru Huang

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

Research progress on low-power artificial intelligence of things (AIoT) chip design.

Le Ye, Zhixuan Wang, Tianyu Jia, Yufei Ma, Linxiao Shen, Yihan Zhang, Heyi Li, Peiyu Chen, Meng Wu, Ying Liu, Yiqi Jing, Hao Zhang, Ru Huang

Sci. China Inf. Sci., October, 2023

An 82-nW 0.53-pJ/SOP Clock-Free Spiking Neural Network With 40-μs Latency for AIoT Wake-Up Functions Using a Multilevel-Event-Driven Bionic Architecture and Computing-in-Memory Technique.

Ying Liu, Yufei Ma, Wei He, Zhixuan Wang, Linxiao Shen, Jiayoon Ru, Ru Huang, Le Ye

IEEE Trans. Circuits Syst. I Regul. Pap., 2023

A A 22nm 0.43pJ/SOP Sparsity-Aware In-Memory Neuromorphic Computing System with Hybrid Spiking and Artificial Neural Network and Configurable Topology.

Ying Liu, Zhiyuan Chen, Zhixuan Wang, Wentao Zhao, Wei He, Jianfeng Zhu, Oijun Wang, Ning Zhang, Tianyu Jia, Yufei Ma, Le Ye, Ru Huang

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022

An 82nW 0.53pJ/SOP Clock-Free Spiking Neural Network with 40µs Latency for AloT Wake-Up Functions Using Ultimate-Event-Driven Bionic Architecture and Computing-in-Memory Technique.

Ying Liu, Zhixuan Wang, Wei He, Linxiao Shen, Yihan Zhang, Peiyu Chen, Meng Wu, Hao Zhang, Peng Zhou, Jinguang Liu, Guangyu Sun, Jiayoon Ru, Le Ye, Ru Huang

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

The Challenges and Emerging Technologies for Low-Power Artificial Intelligence IoT Systems.

Le Ye, Zhixuan Wang, Ying Liu, Peiyu Chen, Heyi Li, Hao Zhang, Meng Wu, Wei He, Linxiao Shen, Yihan Zhang, Zhichao Tan, Yangyuan Wang, Ru Huang

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A 148-nW Reconfigurable Event-Driven Intelligent Wake-Up System for AIoT Nodes Using an Asynchronous Pulse-Based Feature Extractor and a Convolutional Neural Network.

Zhixuan Wang, Ying Liu, Peng Zhou, Zhichao Tan, Haitao Fan, Yihan Zhang, Linxiao Shen, Jiayoon Ru, Yangyuan Wang, Le Ye, Ru Huang

IEEE J. Solid State Circuits, 2021

12.1 A 148nW General-Purpose Event-Driven Intelligent Wake-Up Chip for AIoT Devices Using Asynchronous Spike-Based Feature Extractor and Convolutional Neural Network.

Zhixuan Wang, Le Ye, Ying Liu, Peng Zhou, Zhichao Tan, Haitao Fan, Yihan Zhang, Jiayoon Ru, Yangyuan Wang, Ru Huang

Proceedings of the IEEE International Solid-State Circuits Conference, 2021