Yizhao Gao

Orcid: 0000-0001-5673-3746

Affiliations:
  • University of Hong Kong, Department of Electrical and Electronic Engineering, Hong Kong
  • University of Chinese Academy of Sciences, School of Electronic, Electrical and Communication Engineering, Beijing, China (former)


According to our database1, Yizhao Gao authored at least 20 papers between 2019 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2025
SeerAttention-R: Sparse Attention Adaptation for Long Reasoning.
CoRR, June, 2025

Rectified Sparse Attention.
CoRR, June, 2025

TATAA: Programmable Mixed-Precision Transformer Acceleration with a Transformable Arithmetic Architecture.
ACM Trans. Reconfigurable Technol. Syst., 2025

2024
DyBit: Dynamic Bit-Precision Numbers for Efficient Quantized Neural Network Inference.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2024

SeerAttention: Learning Intrinsic Sparse Attention in Your LLMs.
CoRR, 2024

A Composable Dynamic Sparse Dataflow Architecture for Efficient Event-based Vision Processing on FPGA.
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

Co-designing a Sub-millisecond Latency Event-based Eye Tracking System with Submanifold Sparse CNN.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024


2023
A Reconfigurable Architecture for Real-time Event-based Multi-Object Tracking.
ACM Trans. Reconfigurable Technol. Syst., December, 2023

Random resistive memory-based deep extreme point learning machine for unified visual processing.
CoRR, 2023

Model-Platform Optimized Deep Neural Network Accelerator Generation through Mixed-Integer Geometric Programming.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

MSD: Mixing Signed Digit Representations for Hardware-efficient DNN Acceleration on FPGA with Heterogeneous Resources.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

DPACS: Hardware Accelerated Dynamic Neural Network Pruning through Algorithm-Architecture Co-design.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
REMOT: A Hardware-Software Architecture for Attention-Guided Multi-Object Tracking with Dynamic Vision Sensors on FPGAs.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

2021
CoDeNet: Efficient Deployment of Input-Adaptive Object Detection on Embedded FPGAs.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

HAO: Hardware-aware Neural Architecture Optimization for Efficient Inference.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

2020
CoDeNet: Algorithm-hardware Co-design for Deformable Convolution.
CoRR, 2020

2019
Algorithm-hardware Co-design for Deformable Convolution.
Proceedings of the Fifth Workshop on Energy Efficient Machine Learning and Cognitive Computing, 2019

Drbox Family: A Group of Object Detection Techniques for Remote Sensing Images.
Proceedings of the 2019 IEEE International Geoscience and Remote Sensing Symposium, 2019

Drboxlight: A Light Object Detection Model for Remote Sensing Applications.
Proceedings of the 2019 IEEE International Geoscience and Remote Sensing Symposium, 2019


  Loading...