Yongjo Kim

Orcid: 0000-0001-5204-2251

According to our database1, Yongjo Kim authored at least 4 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
A Jitter-Programmable Bang-Bang Phase-Locked Loop Using PVT Invariant Stochastic Jitter Monitor.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2017
A 2.3-mW 0.01-mm<sup>2</sup> 1.25-GHz Quadrature Signal Corrector With 1.1-ps Error for Mobile DRAM Interface in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A 2.4-GHz 1.5-mW Digital Multiplying Delay-Locked Loop Using Pulsewidth Comparator and Double Injection Technique.
IEEE J. Solid State Circuits, 2017

2016
19.3 A 2.4GHz 1.5mW digital MDLL using pulse-width comparator and double injection technique in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016


  Loading...