Yoonah Paik

Orcid: 0000-0002-8294-1079

According to our database¹, Yoonah Paik authored at least 10 papers between 2016 and 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

Timeline

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PhD thesis

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Bibliography

2024

Optimal Model Partitioning with Low-Overhead Profiling on the PIM-based Platform for Deep Learning Inference.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., March, 2024

2023

PISA-DMA: Processing-in-Memory Instruction Set Architecture Using DMA.

[BibT_eX]

[DOI]

IEEE Access, 2023

BL-PIM: Varying the Burst Length to Realize the All-Bank Performance and Minimize the Multi-Workload Interference for in-DRAM PIM.

[BibT_eX]

[DOI]

IEEE Access, 2023

2022

Silent-PIM: Realizing the Processing-in-Memory Computing With Standard Memory Requests.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2022

Achieving the Performance of All-Bank In-DRAM PIM With Standard Memory Interface: Memory-Computation Decoupling.

[BibT_eX]

[DOI]

IEEE Access, 2022

2021

Tile-based Code Generation for Efficiently Accessing to Scratchpad Memory.

[BibT_eX]

[DOI]

Jaewook Lee

Yoonah Paik

Seon Wook Kim

Proceedings of the International Conference on Electronics, Information, and Communication, 2021

2020

Generating Representative Test Sequences from Real Workload for Minimizing DRAM Verification Overhead.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2020

2019

Fault Tolerance Technique Offlining Faulty Blocks by Heap Memory Management.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2019

Design of Processing-"Inside"-Memory Optimized for DRAM Behaviors.

[BibT_eX]

[DOI]

IEEE Access, 2019

2016

High-throughput low-area design of AES using constant binary matrix-vector multiplication.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2016

Yoonah Paik

Timeline

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