Yuhwan Ro
Orcid: 0000-0001-8100-9071
According to our database1,
Yuhwan Ro authored at least 17 papers
between 2006 and 2026.
Collaborative distances:
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Bibliography
2026
PIM-SHERPA: Software Method for On-device LLM Inference by Resolving PIM Memory Attribute and Layout Inconsistencies.
CoRR, March, 2026
2024
IEEE Micro, 2024
2023
Proceedings of the 35th IEEE Hot Chips Symposium, 2023
2022
Aquabolt-XL HBM2-PIM, LPDDR5-PIM With In-Memory Processing, and AXDIMM With Acceleration Buffer.
IEEE Micro, 2022
2021
25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for ML accelerators and beyond.
Proceedings of the IEEE Hot Chips 33 Symposium, 2021
2019
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019
2018
IEEE Access, 2018
2017
Selective DRAM cache bypassing for improving bandwidth on DRAM/NVM hybrid main memory systems.
IEICE Electron. Express, 2017
IEEE Comput. Archit. Lett., 2017
Understanding power-performance relationship of energy-efficient modern DRAM devices.
Proceedings of the 2017 IEEE International Symposium on Workload Characterization, 2017
SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017
2013
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013
2008
IEEE J. Solid State Circuits, 2008
2007
A 0.1-µm 1.8-V 256-Mb Phase-Change Random Access Memory (PRAM) With 66-MHz Synchronous Burst-Read Operation.
IEEE J. Solid State Circuits, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2006
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006