Yoshihiro Nakatani

According to our database, Yoshihiro Nakatani authored at least 4 papers between 2005 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

A Switch Block for Multi-Context FPGAs Based on Floating-Gate-MOS Functional Pass-Gates Using Multiple/Binary Valued Hybrid Signals?

Shota Ishihara, Noriaki Idobata, Yoshihiro Nakatani, Masanori Hariyama

J. Multiple Valued Log. Soft Comput., 2011

2006

Switch Block Architecture for Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals.

Yoshihiro Nakatani, Masanori Hariyama, Michitaka Kameyama

Proceedings of the 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 2006

Architecture of a multi-context FPGA using a hybrid multiple-valued/binary context switching signal.

Yoshihiro Nakatani, Masanori Hariyama, Michitaka Kameyama

Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005

Dynamic Multi-Context Reconfiguration Scheme for Reconfigurable Parallel Image Processing System with Three Dimensional Structure.

Takeaki Sugimura, Yuta Konishi, Yoshihiro Nakatani, Takafumi Fukushima, Hiroyuki Kurino, Mitsumasa Koyanagi

Proceedings of the 18th International Conference on Architecture of Computing Systems, 2005