Zhe Xuan

Orcid: 0000-0003-4583-4060

According to our database1, Zhe Xuan authored at least 11 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
8-λ × 50 Gbps/λ Heterogeneously Integrated Si-Ph DWDM Transmitter.
IEEE J. Solid State Circuits, March, 2024

2023
A 256 Gbps Heterogeneously Integrated Silicon Photonic Microring-based DWDM Receiver Suitable for In-Package Optical I/O.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A 3D-integrated 8λ × 32 Gbps λ Silicon Photonic Microring-based DWDM Transmitter.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022
Silicon Photonic Microring-Based 4 × 112 Gb/s WDM Transmitter With Photocurrent-Based Thermal Control in 28-nm CMOS.
IEEE J. Solid State Circuits, 2022

2021
Silicon Photonic Micro-Ring Modulator-based 4 x 112 Gb/s O-band WDM Transmitter with Ring Photocurrent-based Thermal Control in 28nm CMOS.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

A 4×50 Gb/s All-Silicon Ring-based WDM Transceiver with CMOS IC.
Proceedings of the European Conference on Optical Communication, 2021

2015
A 25 Gb/s, 4.4 V-Swing, AC-Coupled Ring Modulator-Based WDM Transmitter with Wavelength Stabilization in 65 nm CMOS.
IEEE J. Solid State Circuits, 2015

Hadoop-Based Analysis for Large-Scale Click-Through Patterns in 4G Network.
Proceedings of the Wireless Algorithms, Systems, and Applications, 2015

22.6 A 25Gb/s 4.4V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
Ultra-compact 320 Gb/s and 160 Gb/s WDM transmitters based on silicon microrings.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2014

A 40-GHz bandwidth transimpedance amplifier with adjustable gain-peaking in 65-nm CMOS.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014


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