Zhengkun Shen
Orcid: 0000-0003-1369-9271Affiliations:
- Peking University, Beijing, China
According to our database1,
Zhengkun Shen
authored at least 14 papers
between 2018 and 2023.
Collaborative distances:
Collaborative distances:
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on orcid.org
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Bibliography
2023
An All-Digital Outphasing Transmitter IC for Ka-Band Bit-to-RF Concurrent Multi-Beam DBF Array.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2022
A 24 GHz Self-Calibrated All-Digital FMCW Synthesizer With 0.01% RMS Frequency Error Under 3.2 GHz Chirp Bandwidth and 320 MHz/µs Chirp Slope.
IEEE J. Solid State Circuits, 2022
2021
32.5 A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
A Hybrid Digital Transmitter Architecture for High- Efficiency and High-Speed Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
A Gm-Compensated 46-101 GHz Broadband Power Amplifier for High-Resolution FMCW Radars.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
A 12-GHz Calibration-Free All-Digital PLL for FMCW Signal Generation With 78 MHz/μs Chirp Slope and High Chirp Linearity.
IEEE Trans. Circuits Syst., 2020
An 81-99 GHz Tripler with Fundamental Cancellation and 3rd Harmonic Enhancement Technique in 40-nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
A 2.9 GHz Variable Inductor-Based DCO With 1.3 kHz Frequency Resolution for FMCW Radar Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
A 28 GHz 8-Bit Calibration-Free LO-Path Phase Shifter using Transformer-Based Vector Summing Topology in 40 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Calibration-Free Fractional-N ADPLL using Retiming Architecture and a 9-bit 0.3ps-INL Phase Interpolator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A 12-GHz All-Digital Calibration-Free FMCW Signal Generator Based on a Retiming Fractional Frequency Divider.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
A 12-bit 2.5 GHz 0.37ps-Peak-INL Digital-to-Time Converter with Parasitic-Insensitive Charge-Based Phase Interpolator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A 43.2 μW 2.4 GHz 64-QAM Pseudo-Backscatter Modulator Based on Integrated Directional Coupler.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018