Fan Yang
Affiliations:- Peking University, Institute of Microelectronics, MOE Key Laboratory of Microelectronic Devices and Circuits, Beijing, China (PhD 2017)
According to our database1,
Fan Yang
authored at least 14 papers
between 2014 and 2023.
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Bibliography
2023
An All-Digital Outphasing Transmitter IC for Ka-Band Bit-to-RF Concurrent Multi-Beam DBF Array.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2022
A 24 GHz Self-Calibrated All-Digital FMCW Synthesizer With 0.01% RMS Frequency Error Under 3.2 GHz Chirp Bandwidth and 320 MHz/µs Chirp Slope.
IEEE J. Solid State Circuits, 2022
2021
32.5 A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
A 12-GHz Calibration-Free All-Digital PLL for FMCW Signal Generation With 78 MHz/μs Chirp Slope and High Chirp Linearity.
IEEE Trans. Circuits Syst., 2020
2018
A 2.4-mW interference-resilient receiver front end with series N-path filter-based balun for body channel communication.
Int. J. Circuit Theory Appl., 2018
A Digital Phase Noise Cancelling Scheme for Ring Oscillator-based Fractional-N ADPLL.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
A single-poly EEPROM with low leakage charge pump and peripheral circuits for passive RFID tag in a standard CMOS technology.
IEICE Electron. Express, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
A 93.7% peak efficiency DC-DC buck converter with all-pass network based passive level shifter in 55 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
A low-power calibration-free fractional-N digital PLL with high linear phase interpolator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2015
A high frequency resolution digitally controlled oscillator with differential tapped inductor.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
A power efficient 1.0625-3.125 Gb/s serial transceiver in 130 nm digital CMOS for multi-standard applications.
Sci. China Inf. Sci., 2014