Zherui Zhang
According to our database1,
Zherui Zhang
authored at least 18 papers
between 2016 and 2024.
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Bibliography
2024
A Comparative Visual Analytics Framework for Evaluating Evolutionary Processes in Multi-Objective Optimization.
IEEE Trans. Vis. Comput. Graph., January, 2024
2022
A 24 GHz Self-Calibrated All-Digital FMCW Synthesizer With 0.01% RMS Frequency Error Under 3.2 GHz Chirp Bandwidth and 320 MHz/µs Chirp Slope.
IEEE J. Solid State Circuits, 2022
Maximum Focal Inter-Class Angular Loss with Norm Constraint for Automatic Modulation Classification.
Proceedings of the IEEE Global Communications Conference, 2022
MTF<sup>2</sup>N: Multi-Channel Temporal-Frequency Fusion Network for Spectrum Prediction.
Proceedings of the IEEE Global Communications Conference, 2022
Proceedings of the Information Retrieval - 28th China Conference, 2022
2021
A Hybrid Intrusion Detection System Based on Machine Learning under Differential Privacy Protection.
Proceedings of the 94th IEEE Vehicular Technology Conference, 2021
Research on Automatic Modulation Classification Technology under α Stable Distribution Noise.
Proceedings of the IEEE 18th International Conference on Mobile Ad Hoc and Smart Systems, 2021
Proceedings of the 24th IEEE International Intelligent Transportation Systems Conference, 2021
32.5 A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the 8th International Conference on Dependable Systems and Their Applications, 2021
2020
A 12-GHz Calibration-Free All-Digital PLL for FMCW Signal Generation With 78 MHz/μs Chirp Slope and High Chirp Linearity.
IEEE Trans. Circuits Syst., 2020
2019
A 2.9 GHz Variable Inductor-Based DCO With 1.3 kHz Frequency Resolution for FMCW Radar Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
A Calibration-Free Fractional-N ADPLL using Retiming Architecture and a 9-bit 0.3ps-INL Phase Interpolator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A 12-GHz All-Digital Calibration-Free FMCW Signal Generator Based on a Retiming Fractional Frequency Divider.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
A Digital Phase Noise Cancelling Scheme for Ring Oscillator-based Fractional-N ADPLL.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A 12-bit 2.5 GHz 0.37ps-Peak-INL Digital-to-Time Converter with Parasitic-Insensitive Charge-Based Phase Interpolator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2016
A low-power calibration-free fractional-N digital PLL with high linear phase interpolator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016