Zhenyu Bai

Orcid: 0009-0009-4245-3140

According to our database1, Zhenyu Bai authored at least 19 papers between 2020 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Matterhorn: Efficient Analog Sparse Spiking Transformer Architecture with Masked Time-To-First-Spike Encoding.
CoRR, January, 2026

Representation of Solutions to a Two-Sided Matrix Delay Differential Equations.
Axioms, 2026

A Data-Driven Dynamic Execution Orchestration Architecture.
Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2026

2025
TL: Automatic End-to-End Compiler of Tile-Based Languages for Spatial Dataflow Architectures.
CoRR, December, 2025

TerEffic: Highly Efficient Ternary LLM Inference on FPGA.
CoRR, February, 2025

Data-aware Dynamic Execution of Irregular Workloads on Heterogeneous Systems.
CoRR, February, 2025

Enhancing CGRA Efficiency Through Aligned Compute and Communication Provisioning.
Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2025

2024
The Existence and Averaging Principle for Caputo Fractional Stochastic Delay Differential Systems with Poisson Jumps.
Axioms, January, 2024

Reconsidering the energy efficiency of spiking neural networks.
CoRR, 2024

SparrowSNN: A Hardware/software Co-design for Energy Efficient ECG Classification.
CoRR, 2024

Existence of Solutions for Nonlinear Choquard Equations with (p, q)-Laplacian on Finite Weighted Lattice Graphs.
Axioms, 2024

ASADI: Accelerating Sparse Attention Using Diagonal-based In-Situ Computing.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

SWAT: Scalable and Efficient Window Attention-based Transformers Acceleration on FPGAs.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

ZeD: A Generalized Accelerator for Variably Sparse Matrix Computations in ML.
Proceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques, 2024

2023
Computing Execution Times With Execution Decision Diagrams in the Presence of Out-of-Order Resources.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

Modélisation du comportement temporel du pipeline pour le calcul de WCET. (Pipeline Temporal Behavior Modeling for WCET Computation).
PhD thesis, 2023

2022
A Framework for Calculating WCET Based on Execution Decision Diagrams.
ACM Trans. Embed. Comput. Syst., 2022

An efficient automatic scoring algorithm based on SQL code.
Proceedings of the International Conference on Computers, 2022

2020
Improving the Performance of WCET Analysis in the Presence of Variable Latencies.
Proceedings of the 21st ACM SIGPLAN/SIGBED International Conference on Languages, 2020


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