Zhihang Wu

According to our database, Zhihang Wu authored at least 6 papers between 2022 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

A Learning-Based Approach for Single Event Transient Analysis in Pass Transistor Logic.

Z. Zhang, Zhihang Wu, Christian Weis, Norbert Wehn, Mehdi Baradaran Tahoori

Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

2022

VECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis.

Sanbao Su, Chang Meng, Fan Yang, Xiaolong Shen, Leibin Ni, Wei Wu, Zhihang Wu, Junfeng Zhao, Weikang Qian

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology.

André Lucas Chinazzo, Jan Lappas, Christian Weis, Qinhui Huang, Zhihang Wu, Leibin Ni, Norbert Wehn

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

Machine learning based soft error rate estimation of pass transistor logic in high-speed communication.

Zhe Zhang, Jan Lappas, André Lucas Chinazzo, Christian Weis, Zhihang Wu, Leibin Ni, Norbert Wehn, Mehdi B. Tahoori

Proceedings of the IEEE European Test Symposium, 2022

Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node.

Jan Lappas, André Lucas Chinazzo, Christian Weis, Chenyang Xia, Zhihang Wu, Leibin Ni, Norbert Wehn

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

SEALS: sensitivity-driven efficient approximate logic synthesis.

Chang Meng, Xuan Wang, Jiajun Sun, Sijun Tao, Wei Wu, Zhihang Wu, Leibin Ni, Xiaolong Shen, Junfeng Zhao, Weikang Qian

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022