Zicong Wang

Orcid: 0009-0004-2807-4674

According to our database1, Zicong Wang authored at least 13 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Persistent Homology Based Generative Adversarial Network.
Proceedings of the 18th International Joint Conference on Computer Vision, 2023

LARE: A Linear Approximate Reinforcement Learning Based Adaptive Routing for Network-on-Chips.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Design and Control of a Portable Soft Exosuit by Musculoskeletal Model-Based Optimization.
Proceedings of the Intelligent Robotics and Applications - 16th International Conference, 2023

2022
MUSH: Multi-scale Hierarchical Feature Extraction for Semantic Image Synthesis.
Proceedings of the Computer Vision - ACCV 2022, 2022

2021
A Novel Reinforcement Learning Framework for Adaptive Routing in Network-on-Chips.
Proceedings of the 2021 IEEE 23rd Int Conf on High Performance Computing & Communications; 7th Int Conf on Data Science & Systems; 19th Int Conf on Smart City; 7th Int Conf on Dependability in Sensor, 2021

RELAR: A Reinforcement Learning Framework for Adaptive Routing in Network-on-Chips.
Proceedings of the IEEE International Conference on Cluster Computing, 2021

2019
Load-Balanced Link Distribution in Mesh-Based Many-Core Systems.
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019

2018
VP-Router: On balancing the traffic load in on-chip networks.
IEICE Electron. Express, 2018

Cache Access Fairness in 3D Mesh-Based NUCA.
IEEE Access, 2018

2017
Fairness-oriented switch allocation for networks-on-chip.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Fairness-Oriented and Location-Aware NUCA for Many-Core SoC.
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017

2016
DLL: A dynamic latency-aware load-balancing strategy in 2.5D NoC architecture.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Overcoming and Analyzing the Bottleneck of Interposer Network in 2.5D NoC Architecture.
Proceedings of the Advanced Computer Architecture - 11th Conference, 2016


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