Akira Hyogo

According to our database1, Akira Hyogo authored at least 31 papers between 1997 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
Digital Calibration Algorithm of Conversion Error Influenced by Parasitic Capacitance in C-C SAR-ADC Based on γ-Estimation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021

2019
Examination of Incremental ADC with SAR ADC to Reduce Conversion Time with High Accuracy.
Proceedings of the 2019 International Symposium on Intelligent Signal Processing and Communication Systems, 2019

Duty Ratio and Capacitance Analysis of AC/DC Converter without Current Control Circuit.
Proceedings of the 2019 International Symposium on Intelligent Signal Processing and Communication Systems, 2019

Investigation of Hybrid ADC Combined with First-order Feedforward Incremental and SAR ADCs.
Proceedings of the 2019 International Symposium on Intelligent Signal Processing and Communication Systems, 2019

2018
25-Gbps 3-mW/Gbps/ch VCSEL Driver Circuit in 65-nm CMOS for Multichannel Optical Transmitter.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

Time-Shared DAC in SAR ADC for Tx Beamforming of Ultrasound Application.
Proceedings of the 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2018

A Novel C-2αC Ladder Based Non-binary DAC for SAR-ADC Using Unit Capacitors.
Proceedings of the 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2018

2017
Non-binary cyclic and binary SAR hybrid ADC.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

2016
A Replica-Amp Gain Enhancement Technique for an Operational Amplifier with Low Mismatch Sensitivity and High Voltage Swing.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016

2010
A Signal Detection Circuit for 8b/10b 2.5 Gb/s Serial Data Communication System in 90 nm CMOS.
IEICE Trans. Electron., 2010

2009
Foreword.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

2008
Input-Feedforward Two-Path Band-Pass Delta-Sigma Modulator Based on Horizontal or Vertical Opamp Sharing Technique.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

Balanced Three-Phase Active-RC Tow-Thomas Biquad Complex Filter for Wireless Communication Systems.
IEICE Trans. Electron., 2008

A High-Q Active Inductor Circuit for Quasi-Millimeter-Wave Frequency Range.
IEICE Trans. Electron., 2008

A 5Gb/s adaptive equalizer using filter switching.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

Signal-to-noise ratio improvement of common-gate CMOS LNA for Ultra-Wide-Band.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
A High Impedance Current Source Using Active Resistor.
IEICE Trans. Electron., 2007

2006
A Design Approach for Low Phase Noise 5GHz Complementary Quadrature Oscillator.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005
A low voltage OTA using MOSFET in the triode region and cascode current mirror.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

A 2.0-V folding circuit using current limiting amplifier for ADC.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2003
An Equivalent MOSFET Cell Using Adaptively Biased Source-Coupled Pair.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

A CMOS Current-Mode Band-Pass Filter Using <i>Q</i>-Enhancement Technique.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

A 1.8-V 73-dB dynamic-range CMOS variable gain amplifier.
Proceedings of the ESSCIRC 2003, 2003

2002
A Digitally Programmable CMOS Universal Biquad Filter Using Current-Mode Integrators.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

2.4-GHz-Band CMOS RF Front-End Building Blocks at a 1.8-V Supply.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

A V<sub>t</sub>-zero equivalent MOSFET and its applications.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Low-power ASK receiver circuit for wireless communication system.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2001
A CMOS OTA free from second order effects with a high input resistance Gm control terminal.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
A 1-MHz 7th-order continuous-time lowpass filter using very low distortion CMOS OTAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Low voltage four-quadrant analog multiplier using square-root circuit based on CMOS pair.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1997
A low-voltage, low-power CMOS fifth-order elliptic GM-C filter for baseband mobile, wireless communication.
IEEE Trans. Circuits Syst. Video Technol., 1997


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