Ameer Haj-Ali

Orcid: 0000-0001-8515-2828

According to our database1, Ameer Haj-Ali authored at least 21 papers between 2017 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
TenSet: A Large-scale Program Performance Dataset for Learned Tensor Compilers.
Proceedings of the Neural Information Processing Systems Track on Datasets and Benchmarks 1, 2021

Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Machine Learning in Compiler Optimization.
PhD thesis, 2020

SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

ProTuner: Tuning Programs with Monte Carlo Tree Search.
CoRR, 2020

Ansor: Generating High-Performance Tensor Programs for Deep Learning.
Proceedings of the 14th USENIX Symposium on Operating Systems Design and Implementation, 2020

RLDRM: Closed Loop Dynamic Cache Allocation with Deep Reinforcement Learning for Network Function Virtualization.
Proceedings of the 6th IEEE Conference on Network Softwarization, 2020

AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning.
Proceedings of Machine Learning and Systems 2020, 2020

AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

NeuroVectorizer: end-to-end vectorization with deep reinforcement learning.
Proceedings of the CGO '20: 18th ACM/IEEE International Symposium on Code Generation and Optimization, 2020

2019
Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures.
CoRR, 2019

Deep Reinforcement Learning in System Optimization.
CoRR, 2019

AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning.
CoRR, 2019

AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

A Taxonomy and Evaluation Framework for Memristive Logic.
Proceedings of the Handbook of Memristor Networks., 2019

2018
IMAGING: In-Memory AlGorithms for Image processiNG.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Not in Name Alone: A Memristive Memory Processing Unit for Real In-Memory Processing.
IEEE Micro, 2018

Efficient Algorithms for In-Memory Fixed Point Multiplication Using MAGIC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Practical challenges in delivering the promises of real processing-in-memory machines.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Memristive logic: A framework for evaluation and comparison.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017


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