Shahar Kvatinsky

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024

Experimental Demonstration of Non-Stateful In-Memory Logic With 1T1R OxRAM Valence Change Mechanism Memristors.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

Understanding Bulk-Bitwise Processing In-Memory Through Database Analytics.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2024

Bitwise Logic Using Phase Change Memory Devices Based on the Pinatubo Architecture.

[BibT_eX]

[DOI]

Noa Aflalo

Eilam Yalon

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

ClaPIM: Scalable Sequence Classification Using Processing-in-Memory.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., September, 2023

AritPIM: High-Throughput In-Memory Arithmetic.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2023

TDPP: Two-Dimensional Permutation-Based Protection of Memristive Deep Neural Networks.

[BibT_eX]

[DOI]

Minhui Zou

Zhenhua Zhu

CoRR, 2023

CUDA-PIM: End-to-End Integration of Digital Processing-in-Memory from High-Level C++ to Microarchitectural Design.

[BibT_eX]

[DOI]

CoRR, 2023

ConvPIM: Evaluating Digital Processing-in-Memory through Convolutional Neural Network Acceleration.

[BibT_eX]

[DOI]

CoRR, 2023

FourierPIM: High-Throughput In-Memory Fast Fourier Transform and Polynomial Multiplication.

[BibT_eX]

[DOI]

CoRR, 2023

Enabling Relational Database Analytical Processing in Bulk-Bitwise Processing-In-Memory.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

Accelerating Relational Database Analytical Processing with Bulk-Bitwise Processing-in-Memory.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

On Consistency for Bulk-Bitwise Processing-in-Memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

2022

Superconductive Logic Using 2ϕ - Josephson Junctions With Half Flux Quantum Pulses.

[BibT_eX]

[DOI]

Issa Salameh

Eby G. Friedman

IEEE Trans. Circuits Syst. II Express Briefs, 2022

MultPIM: Fast Stateful Multiplication for Processing-in-Memory.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

C-AND: Mixed Writing Scheme for Disturb Reduction in 1T Ferroelectric FET Memory.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2022

Stateful Logic using Phase Change Memory.

[BibT_eX]

[DOI]

Nicolás Wainstein

Christopher M. Neumann

Eric Pop

Eilam Yalon

CoRR, 2022

Review of security techniques for memristor computing systems.

[BibT_eX]

[DOI]

Minhui Zou

Nan Du

CoRR, 2022

Performing Stateful Logic Using Spin-Orbit Torque (SOT) MRAM.

[BibT_eX]

[DOI]

CoRR, 2022

PartitionPIM: Practical Memristive Partitions for Fast Processing-in-Memory.

[BibT_eX]

[DOI]

CoRR, 2022

Making Real Memristive Processing-in-Memory Faster and Reliable.

[BibT_eX]

[DOI]

CoRR, 2022

PIMDB: Understanding Bulk-Bitwise Processing In-Memory Through Database Analytics.

[BibT_eX]

[DOI]

CoRR, 2022

Memristive deep belief neural network by silicon synapses.

[BibT_eX]

[DOI]

CoRR, 2022

Physical based compact model of Y-Flash memristor for neuromorphic computation.

[BibT_eX]

[DOI]

Evgeny Pikhay

Yakov Roizin

CoRR, 2022

Efficient Training of the Memristive Deep Belief Net Immune to Non-Idealities of the Synaptic Devices.

[BibT_eX]

[DOI]

Wei Wang

Adv. Intell. Syst., 2022

HashPIM: High-Throughput SHA-3 via Memristive Digital Processing-in-Memory.

[BibT_eX]

[DOI]

Proceedings of the 11th International Conference on Modern Circuits and Systems Technologies, 2022

Enhancing Security of Memristor Computing System Through Secure Weight Mapping.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

MatPIM: Accelerating Matrix Operations with Memristive Stateful Logic.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Undergraduate Students' Attitudes Toward an Engineering Course that Integrates Several Levels of Abstraction.

[BibT_eX]

[DOI]

Aharon Gero

Mohammed Ali Hadish

Proceedings of the Learning in the Age of Digital and Green Transition, 2022

2021

Radiofrequency Switches Based on Emerging Resistive Memory Technologies - A Survey.

[BibT_eX]

[DOI]

Proc. IEEE, 2021

Improving Efficiency and Lifetime of Logic-in-Memory by Combining IMPLY and MAGIC Families.

[BibT_eX]

[DOI]

J. Syst. Archit., 2021

multiPULPly: A Multiplication Engine for Accelerating Neural Networks on Ultra-low-power Architectures.

[BibT_eX]

[DOI]

Adi Eliahu

ACM J. Emerg. Technol. Comput. Syst., 2021

(V)TEAM for SPICE Simulation of Memristive Devices With Improved Numerical Performance.

[BibT_eX]

[DOI]

IEEE Access, 2021

Making Memristive Processing-in-Memory Reliable.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE International Conference on Electronics, 2021

FiltPIM: In-Memory Filter for DNA Sequencing.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE International Conference on Electronics, 2021

Efficient Error-Correcting-Code Mechanism for High-Throughput Memristive Processing-in-Memory.

[BibT_eX]

[DOI]

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput.

[BibT_eX]

[DOI]

Rotem Ben Hur

Ameer Haj Ali

Debjyoti Bhattacharjee

Adi Eliahu

Natan Peled

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Cytomorphic Electronics With Memristors for Modeling Fundamental Genetic Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Biomed. Circuits Syst., 2020

X-MAGIC: Enhancing PIM Using Input Overwriting Capabilities.

[BibT_eX]

[DOI]

Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

abstractPIM: A Technology Backward-Compatible Compilation Flow for Processing-In-Memory.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: Design Trends, 2020

abstractPIM: Bridging the Gap Between Processing-In-Memory Technology and Instruction Set Architecture.

[BibT_eX]

[DOI]

Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

A Pipelined Memristive Neural Network Analog-to-Digital Converter.

[BibT_eX]

[DOI]

Kanishka Sharma

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

CONTRA: Area-Constrained Technology Mapping Framework For Memristive Memory Processing Unit.

[BibT_eX]

[DOI]

Debjyoti Bhattacharjee

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Breaking the Conversion Wall in Mixed-Signal Systems Using Neuromorphic Data Converters.

[BibT_eX]

[DOI]

Proceedings of the European Conference on Circuit Theory and Design, 2020

Sensing with Memristive Complementary Resistive Switch: Modelling and Simulations.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

An Asynchronous and Low-Power True Random Number Generator Using STT-MTJ.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse.

[BibT_eX]

[DOI]

Roee Mazor

Ameer Haj Ali

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A Robust Digital RRAM-Based Convolutional Block for Low-Power Image Processing and Learning Applications.

[BibT_eX]

[DOI]

Edouard Giacomin

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Understanding the influence of device, circuit and environmental variations on real processing in memristive memory using Memristor Aided Logic.

[BibT_eX]

[DOI]

Nimrod Wald

Microelectron. J., 2019

Adaptive programming in multi-level cell ReRAM.

[BibT_eX]

[DOI]

Microelectron. J., 2019

CONCEPT: A Column-Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM.

[BibT_eX]

[DOI]

IEEE Micro, 2019

MTJ-Based Hardware Synapse Design for Quantized Deep Neural Networks.

[BibT_eX]

[DOI]

Daniel Soudry

CoRR, 2019

The Bitlet Model: Defining a Litmus Test for the Bitwise Processing-in-Memory Paradigm.

[BibT_eX]

[DOI]

CoRR, 2019

Accelerating Inference on Binary Neural Networks with Digital RRAM Processing.

[BibT_eX]

[DOI]

João Vieira

Edouard Giacomin

Yasir Mahmood Qureshi

Proceedings of the VLSI-SoC: New Technology Enabler, 2019

A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories.

[BibT_eX]

[DOI]

João Vieira

Edouard Giacomin

Yasir Mahmood Qureshi

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Real Processing-In-Memory with Memristive Memory Processing Unit.

[BibT_eX]

[DOI]

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2019

A Dual-Band CMOS Low-Noise Amplifier using Memristor-Based Tunable Inductors.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Delta-Sigma Modulation Neurons for High-Precision Training of Memristive Synapses in Deep Neural Networks.

[BibT_eX]

[DOI]

Sidharth Thomas

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

The Missing Applications Found: Robust Design Techniques and Novel Uses of Memristors.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Performing Memristor-Aided Logic (MAGIC) using STT-MRAM.

[BibT_eX]

[DOI]

Jeffry Louis

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

STT-ANGIE: Asynchronous True Random Number GEnerator Using STT-MTJ.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Logarithmic Neural Network Data Converters using Memristors for Biomedical Applications.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

Real Processing-in-Memory with Memristive Memory Processing Unit (mMPU).

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

A Taxonomy and Evaluation Framework for Memristive Logic.

[BibT_eX]

[DOI]

Proceedings of the Handbook of Memristor Networks., 2019

2018

Breaking Through the Speed-Power-Accuracy Tradeoff in ADCs Using a Memristive Neuromorphic Architecture.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput. Intell., 2018

TIME - Tunable Inductors Using MEmristors.

[BibT_eX]

[DOI]

Nicolás Wainstein

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

IMAGING: In-Memory AlGorithms for Image processiNG.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Not in Name Alone: A Memristive Memory Processing Unit for Real In-Memory Processing.

[BibT_eX]

[DOI]

IEEE Micro, 2018

Analysis of the row grounding technique in a memristor-based crossbar array.

[BibT_eX]

[DOI]

Alexander Dozortsev

Israel Goldshtein

Int. J. Circuit Theory Appl., 2018

DIDACTIC: A Data-Intelligent Digital-to-Analog Converter with a Trainable Integrated Circuit using Memristors.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Real-Time Trainable Data Converters for General Purpose Applications.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

Efficient Algorithms for In-Memory Fixed Point Multiplication Using MAGIC.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Practical challenges in delivering the promises of real processing-in-memory machines.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Dark Memory and Accelerator-Rich System Optimization in the Dark Silicon Era.

[BibT_eX]

[DOI]

IEEE Des. Test, 2017

Memristive logic: A framework for evaluation and comparison.

[BibT_eX]

[DOI]

Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

An RF memristor model and memristive single-pole double-throw switches.

[BibT_eX]

[DOI]

Nicolás Wainstein

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Rate-compatible and high-throughput architecture designs for encoding LDPC codes.

[BibT_eX]

[DOI]

Nishil Talati

Zhiying Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Simple magic: Synthesis and in-memory Mapping of logic execution for memristor-aided logic.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Towards a memristive hardware secure hash function (MemHash).

[BibT_eX]

[DOI]

Leonid Azriel

Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

Memristor for computing: Myth or reality?

[BibT_eX]

[DOI]

Hesham Mostafa Elsayed

Henk Corporaal

Koen Bertels

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Modeling biochemical reactions and gene networks with memristors.

[BibT_eX]

[DOI]

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

2016

Information-Theoretic Sneak-Path Mitigation in Memristor Crossbar Arrays.

[BibT_eX]

[DOI]

Yuval Cassuto

Eitan Yaakobi

IEEE Trans. Inf. Theory, 2016

Resistive GP-SIMD Processing-In-Memory.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2016

A Systematic Approach to Blocking Convolutional Neural Networks.

[BibT_eX]

[DOI]

Jonathan Ragan-Kelley

Ardavan Pedram

Mark Horowitz

CoRR, 2016

Logic with Unipolar Memristors - Circuits and Design Methodology.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016

Logic design with unipolar memristors.

[BibT_eX]

[DOI]

Elad Amrani

Avishay Drori

Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Memory Processing Unit for in-memory processing.

[BibT_eX]

[DOI]

Rotem Ben Hur

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Evaluating programmable architectures for imaging and vision applications.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Improving energy efficiency of DRAM by exploiting half page row access.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Write sneak-path constraints avoiding disturbs in memristor crossbar arrays.

[BibT_eX]

[DOI]

Yuval Cassuto

Eitan Yaakobi

Proceedings of the IEEE International Symposium on Information Theory, 2016

A fully analog memristor-based neural network with online gradient training.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

Multistate Register Based on Resistive RAM.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

Memristor-Based Multilayer Neural Networks With Online Gradient Descent Training.

[BibT_eX]

[DOI]

IEEE Trans. Neural Networks Learn. Syst., 2015

VTEAM: A General Model for Voltage-Controlled Memristors.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2015

Resistive Associative Processor.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2015

2014

Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2014

MAGIC - Memristor-Aided Logic.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2014

Logic operations in memory using a memristive Akers array.

[BibT_eX]

[DOI]

Microelectron. J., 2014

Memristor-Based Multithreading.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2014

2013

TEAM: ThrEshold Adaptive Memristor Model.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Sneak-path constraints in memristor crossbar arrays.

[BibT_eX]

[DOI]

Yuval Cassuto