Andreas Wieferink

According to our database, Andreas Wieferink authored at least 12 papers between 2001 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

Retargetable processor system integration into multi-processor system on chip platforms.

Andreas Wieferink

PhD thesis, 2008

SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends.

Andreas Wieferink, Tim Kogel, Olaf Zerres, Rainer Leupers, Heinrich Meyr

Int. J. Embed. Syst., 2008

Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips.

Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Heinrich Meyr

Int. J. Embed. Syst., 2008

2007

ASIP architecture exploration for efficient IPSec encryption: A case study.

Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

ACM Trans. Embed. Comput. Syst., 2007

2005

Retargetable generation of TLM bus interfaces for MP-SoC platforms.

Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tom Michiels, Achim Nohl, Tim Kogel

Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

2004

Early ISS Integration into Network-on-Chip Designs.

Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

Proceedings of the Computer Systems: Architectures, 2004

Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs.

Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

Proceedings of the Computer Systems: Architectures, 2004

A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform.

Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl

Proceedings of the 2004 Design, 2004

2003

Processor/Memory Co-Exploration on Multiple Abstraction Levels.

Gunnar Braun, Andreas Wieferink, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Achim Nohl

Proceedings of the 2003 Design, 2003

A modular simulation framework for architectural exploration of on-chip interconnection networks.

Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Serge Goossens

Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003

Generic Tool-Set for SoC Mulitiprocessor Debugging and Synchronization.

Andreas Wieferink, Tim Kogel, Achim Nohl, Andreas Hoffmann

Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

2001

A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language.

Andreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001