David Kammler

According to our database1, David Kammler authored at least 28 papers between 2001 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2012
Memory architectures for ASIPs.
PhD thesis, 2012

FLEXDET: Flexible, Efficient Multi-Mode MIMO Detection Using Reconfigurable ASIP.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011
A retargetable framework for compiler/architecture co-development.
Des. Autom. Embed. Syst., 2011

2010
Automatic Generation of Memory Interfaces for ASIPs.
Int. J. Embed. Real Time Commun. Syst., 2010

2009
Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves.
IACR Cryptol. ePrint Arch., 2009

Efficient And Portable SDR Waveform Development: The Nucleus Concept
CoRR, 2009

Complexity-Efficient Enumeration Techniques for Soft-Input, Soft-Output Sphere Decoding
CoRR, 2009

A Fast and Flexible Platform for Fault Injection and Evaluation in Verilog-Based Simulations.
Proceedings of the Third IEEE International Conference on Secure Software Integration and Reliability Improvement, 2009

Combining orthogonalized partial metrics: Efficient enumeration for soft-input sphere decoder.
Proceedings of the IEEE 20th International Symposium on Personal, 2009

Automatic generation of memory interfaces.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

Searching in the Delta Lattice: An Efficient MIMO Detection for Iterative Receivers.
Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009

Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2009

2008
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors.
ACM Trans. Embed. Comput. Syst., 2008

Power-efficient Instruction Encoding Optimization for Various Architecture Classes.
J. Comput., 2008

2007
ASIP architecture exploration for efficient IPSec encryption: A case study.
ACM Trans. Embed. Comput. Syst., 2007

Application-Specific Instruction-Set Processor for Retinex-Like Image and Video Processing.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

Power-efficient Instruction Encoding Optimization for Embedded Processors.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Pre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable VLIW Processors.
Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

Design space exploration of partially re-configurable embedded processors.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Design of Application Specific Processors for the Cached FFT Algorithm.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

Design of Application Specific Instruction-Set Processor for image and video filtering.
Proceedings of the 14th European Signal Processing Conference, 2006

ASIP design and synthesis for non linear filtering in image processing.
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006

Automatic ADL-based operand isolation for embedded processors.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Optimization Techniques for ADL-Driven RTL Processor Synthesis.
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005

Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

A framework for automated and optimized ASIP implementation supporting multiple hardware description languages.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2001
The fast Fourier transform method and ill-conditioned matrices.
Appl. Math. Comput., 2001


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