Oliver Schliebusch

According to our database1, Oliver Schliebusch authored at least 13 papers between 2001 and 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2007
Optimized ASIP synthesis from architecture description language models.
Kluwer, ISBN: 978-1-4020-5685-7, 2007

2006
ASIP design and synthesis for non linear filtering in image processing.
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006

Automatic ADL-based operand isolation for embedded processors.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Optimization Techniques for ADL-Driven RTL Processor Synthesis.
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005

Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

A framework for automated and optimized ASIP implementation supporting multiple hardware description languages.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
A universal technique for fast and flexible instruction-set architecture simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

RTL Processor Synthesis for Architecture Exploration and Implementation.
Proceedings of the 2004 Design, 2004

2003
Processor/Memory Co-Exploration on Multiple Abstraction Levels.
Proceedings of the 2003 Design, 2003

Instruction encoding synthesis for architecture exploration using hierarchical processor models.
Proceedings of the 40th Design Automation Conference, 2003

2002
Architecture Implementation Using the Machine Description Language LISA.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

2001
A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

A Methodology for the Design of Application Specific Instruction Set Processors (ASIP) using the Machine Description Language LISA.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001


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