Antony Sebastine

According to our database, Antony Sebastine authored at least 5 papers between 2004 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2010

On-Chip Delay Measurement Based Response Analysis for Timing Characterization.

Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham

J. Electron. Test., 2010

2008

Controllability of Static CMOS Circuits for Timing Characterization.

Ramyanshu Datta, Ravi Gupta, Antony Sebastine, Jacob A. Abraham, Manuel A. d'Abreu

J. Electron. Test., 2008

2004

Tri-Scan: A Novel DFT Technique for CMOS Path Delay Fault Testing.

Ramyanshu Datta, Ravi Gupta, Antony Sebastine, Jacob A. Abraham, Manuel A. d'Abreu

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

On-chip delay measurement for silicon debug.

Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Jacob A. Abraham

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

Delay fault testing and silicon debug using scan chains.

Ramyanshu Datta, Antony Sebastine, Jacob A. Abraham

Proceedings of the 9th European Test Symposium, 2004