Manuel A. d'Abreu

According to our database, Manuel A. d'Abreu authored at least 27 papers between 1980 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2011

Nand Flash Memory - Product Trends, Technology Overview, and Technical Challenges.

Manuel A. d'Abreu

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2009

Impact of SoC power management techniques on verification and testing.

Bhanu Kapoor, Shankar Hemmady, Shireesh Verma, Kaushik Roy, Manuel A. d'Abreu

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2008

Controllability of Static CMOS Circuits for Timing Characterization.

Ramyanshu Datta, Ravi Gupta, Antony Sebastine, Jacob A. Abraham, Manuel A. d'Abreu

J. Electron. Test., 2008

Panel: SoC power management implications on validation and testing.

Bhanu Kapoor, John Goodenough, Shankar Hemmady, Shireesh Verma, Manuel A. d'Abreu, Kaushik Roy

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2008

2004

Tri-Scan: A Novel DFT Technique for CMOS Path Delay Fault Testing.

Ramyanshu Datta, Ravi Gupta, Antony Sebastine, Jacob A. Abraham, Manuel A. d'Abreu

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2002

Noise-Its Sources, and Impact on Design and Test of Mixed Signal Circuits.

Manuel A. d'Abreu

Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002

2000

Manufacturing and Test Considerations in System-On-Chip Designs.

Manuel A. d'Abreu

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

1999

FzCRITIC - A Functional Timing Verifier Using a Novel Fuzzy Delay Model.

Rathish Jayabharathi, Manuel A. d'Abreu, Jacob A. Abraham

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

1996

Distributed Mixed Level Logic and Fault Simulation on the Pentium® Pro Microprocessor.

Sankaran Karthik, Mark Aitken, Glidden Martin, Srinivasu Pappula, Bob Stettler, Praveen Vishakantaiah, Manuel A. d'Abreu, Jacob A. Abraham

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

A Hierarchal Approach for Power Reduction in VLSI Chips.

Prakash Arunachalam, Jacob A. Abraham, Manuel A. d'Abreu

Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1994

Microprocessor Testing: Which Technique is Best? (Panel).

Jacob A. Abraham, Sandip Kundu, Janak H. Patel, Manuel A. d'Abreu, Bulent I. Dervisoglu, Marc E. Levitt, Hector R. Sucar, Ron G. Walther

Proceedings of the 31st Conference on Design Automation, 1994

1993

Greedy hardware optimization for linear digital circuits using number splitting and refactorization.

Abhijit Chatterjee, Rabindra K. Roy, Manuel A. d'Abreu

IEEE Trans. Very Large Scale Integr. Syst., 1993

The Design of Fault-Tolerant Linear Digital State Variable Systems: Theory and Techniques.

Abhijit Chatterjee, Manuel A. d'Abreu

IEEE Trans. Computers, 1993

Greedy Hardware Optimization for Linear Digital Systems Using Number Splitting.

Abhijit Chatterjee, Rabindra K. Roy, Manuel A. d'Abreu

Proceedings of the Sixth International Conference on VLSI Design, 1993

1992

Delay fault testing of iterative arithmetic arrays.

Rabindra K. Roy, Naveena Nagi, Abhijit Chatterjee, Manuel A. d'Abreu

Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992

Automatic test generation for linear digital systems with bi-level search using matrix transform methods.

Rabindra K. Roy, Abhijit Chatterjee, Janak H. Patel, Jacob A. Abraham, Manuel A. d'Abreu

Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

1991

Syndrome-Based Functional Delay Fault Location in Linear Digital Data-Flow Graphs.

Abhijit Chatterjee, Manuel A. d'Abreu

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

Concurrent Error Detection and Fault-Tolerance in Linear Digital State Variable Systems.

Abhijit Chatterjee, Manuel A. d'Abreu

Proceedings of the 1991 International Symposium on Fault-Tolerant Computing, 1991

1989

A synthesis environment for designing DSP systems.

Albert E. Casavant, Manuel A. d'Abreu, Martin Dragomirecky, David A. Duff, Jeffrey R. Jasica, Michael J. Hartman, Ki Soo Hwang, William D. Smith

IEEE Des. Test, 1989

Scheduling and hardware sharing in pipelined data paths.

Ki Soo Hwang, Albert E. Casavant, Ching-Tang Chang, Manuel A. d'Abreu

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

FACE Core Environment: The Model and Its Application in CAE/CAD Tool Development.

William D. Smith, David A. Duff, Martin Dragomirecky, James L. Caldwell, Michael J. Hartman, Jeffrey R. Jasica, Manuel A. d'Abreu

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

High-Level Graphical User Interface Management in the FACE Synthesis Environment.

Martin Dragomirecky, Ephraim P. Glinert, Jeffrey R. Jasica, David A. Duff, William D. Smith, Manuel A. d'Abreu

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988

Flexible module generation in the FACE design environment.

William D. Smith, Jeffrey R. Jasica, Michael J. Hartman, Manuel A. d'Abreu

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

Constrained conditional resource sharing in pipeline synthesis.

Ki Soo Hwang, Albert E. Casavant, Martin Dragomirecky, Manuel A. d'Abreu

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

Analog Compilation Based on Successive Decompositions.

E. Berkcan, Manuel A. d'Abreu, W. Laughton

Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988

1984

Oracle - a simulator for Bipolar and MOS IC design.

Manuel A. d'Abreu, K. L. Cheong, C. T. Flanagan

Proceedings of the 21st Design Automation Conference, 1984

1980

An accurate functional level concurrent fault simulator.

Manuel A. d'Abreu, Edward W. Thompson

Proceedings of the 17th Design Automation Conference, 1980