Bijoy Antony Jose

According to our database1, Bijoy Antony Jose authored at least 24 papers between 2006 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
Interactive Robotic Testbed for Performance Assessment of Machine Learning based Computer Vision Techniques.
J. Inf. Sci. Eng., 2020

Enabling Hardware Performance Counters for Microkernel-Based Virtualization on Embedded Systems.
IEEE Access, 2020

Construction Safety Surveillance Using Machine Learning.
Proceedings of the 2020 International Symposium on Networks, Computers and Communications, 2020

2019
Performance Analysis of Microkernel Based Virtualization Techniques on Embedded Systems.
J. Low Power Electron., 2019

Selected Articles from the ISED 2018 Conference.
J. Low Power Electron., 2019

A Kernelized Unified Framework for Domain Adaptation.
IEEE Access, 2019

2018
A Differential Quantizer-Based Error Feedback Modulator for Analog-to-Digital Converters.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

2017
Performance analysis of virtualized embedded computing systems.
Proceedings of the 7th International Symposium on Embedded Computing and System Design, 2017

An Offline Online Strategy for IoT Using MQTT.
Proceedings of the 4th IEEE International Conference on Cyber Security and Cloud Computing, 2017

2016
Interfacing a computer aided design tool with a multi-function numerical machine.
Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016

2015
Improving Energy Efficiency of Virtual Machines with Timer Tick Variations.
J. Low Power Electron., 2015

2011
Formal Model Driven Software Synthesis for Embedded Systems.
PhD thesis, 2011

SMT based false causal loop detection during code synthesis from Polychronous specifications.
Proceedings of the 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011

2010
SCGPSim: a fast SystemC simulator on GPUs.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

An alternative polychronous model and synthesis methodology for model-driven embedded software.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Faster Software Synthesis Using Actor Elimination Techniques for Polychronous Formalism.
Proceedings of the 10th International Conference on Application of Concurrency to System Design, 2010

MRICDF: A Polychronous Model for Embedded Software Synthesis.
Proceedings of the Synthesis of Embedded Software, 2010

2009
Redundant binary partial product generators for compact accumulation in Booth multipliers.
Microelectron. J., 2009

An Analysis of the Composition of Synchronous Systems.
Electron. Notes Theor. Comput. Sci., 2009

Generating Multi-Threaded code from Polychronous Specifications.
Electron. Notes Theor. Comput. Sci., 2009

EmCodeSyn: A visual framework for multi-rate data flow specifications and code synthesis for embedded applications.
Proceedings of the Forum on specification and Design Languages, 2009

2008
On the Deterministic Multi-threaded Software Synthesis from Polychronous Specifications.
Proceedings of the 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), 2008

Formal Transformation of a KPN Specification to a GALS Implementation.
Proceedings of the Forum on specification and Design Languages, 2008

2006
Delay Optimized Redundant Binary Adders.
Proceedings of the 13th IEEE International Conference on Electronics, 2006


  Loading...