Abdoulaye Gamatié
Orcid: 0000-0002-8326-3257Affiliations:
- LIRMM, Montpellier, France
- LIFL, Lille, France (former)
According to our database1,
Abdoulaye Gamatié
authored at least 95 papers
between 2003 and 2024.
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Bibliography
2024
Explainable AI for Embedded Systems Design: A Case Study of Static Redundant NVM Memory Write Prediction.
CoRR, 2024
2023
Sustain. Comput. Informatics Syst., January, 2023
Optimization of Data and Energy Migrations in Mini Data Centers for Carbon-Neutral Computing.
IEEE Trans. Sustain. Comput., 2023
2022
ACM Trans. Embed. Comput. Syst., 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on Program Inputs.
ACM Trans. Embed. Comput. Syst., 2021
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021
GANNoC: A Framework for Automatic Generation of NoC Topologies using Generative Adversarial Networks.
Proceedings of the DroneSE and RAPIDO '21: Methods and Tools, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Water Management in Agriculture: A Survey on Current Challenges and Technological Solutions.
IEEE Access, 2020
Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on Inputs.
Proceedings of the X Brazilian Symposium on Computing Systems Engineering, 2020
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020
2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
Microprocess. Microsystems, 2019
Empirical model-based performance prediction for application mapping on multicore architectures.
J. Syst. Archit., 2019
IET Comput. Digit. Tech., 2019
Exploration of Performance and Energy Trade-offs for Heterogeneous Multicore Architectures.
CoRR, 2019
IEEE Access, 2019
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019
Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2019
2018
Exploration of a scalable and power-efficient asynchronous Network-on-Chip with dynamic resource allocation.
Microprocess. Microsystems, 2018
Energy-Efficient Memory Mappings based on Partial WCET Analysis and Multi-Retention Time STT-RAM.
Proceedings of the 26th International Conference on Real-Time Networks and Systems, 2018
A Compiler-Centric Infra-Structure for Whole-Board Energy Measurement on Heterogeneous Android Systems.
Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018
Evaluation of Heterogeneous Multicore Cluster Architectures Designed for Mobile Computing.
Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018
Compile-Time Silent-Store Elimination for Energy Efficiency: an Analytic Evaluation for Non-Volatile Cache Memory.
Proceedings of the RAPIDO 2018 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018
2017
ElasticSimMATE: A fast and accurate gem5 trace-driven simulator for multicore systems.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017
Scalable and Power-Efficient Implementation of an Asynchronous Router with Buffer Sharing.
Proceedings of the Euromicro Conference on Digital System Design, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Model-Based Design of Correct Controllers for Dynamically Reconfigurable Architectures.
ACM Trans. Embed. Comput. Syst., 2016
Efficient Embedded Software Migration towards Clusterized Distributed-Memory Architectures.
IEEE Trans. Computers, 2016
ACM J. Emerg. Technol. Comput. Syst., 2016
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016
A Workflow for Fast Evaluation of Mapping Heuristics Targeting Cloud Infrastructures.
CoRR, 2016
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016
Loop optimization in presence of STT-MRAM caches: A study of performance-energy tradeoffs.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
Performance Prediction of Application Mapping in Manycore Systems with Artificial Neural Networks.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016
Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016
Design space exploration for complex automotive applications: an engine control system case study.
Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation, 2016
2015
High-level design space exploration for adaptive applications on multiprocessor systems-on-chip.
J. Syst. Archit., 2015
Progressive and explicit refinement of scheduling for multidimensional data-flow applications using UML MARTE.
Des. Autom. Embed. Syst., 2015
Emerging Non-volatile Memory Technologies Exploration Flow for Processor Architecture.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE Architectures.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the Distributed Computing and Internet Technology, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
Adaptivity in high-performance embedded systems: a reactive control model for reliable and flexible design.
Knowl. Eng. Rev., 2014
Performance exploration of partially connected 3D NoCs under manufacturing variability.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
2013
Autonomic Management of Dynamically Partially Reconfigurable FPGA Architectures Using Discrete Control.
Proceedings of the 10th International Conference on Autonomic Computing, 2013
2012
Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: Advantages, limitations and alternatives.
J. Syst. Archit., 2012
CLASSY: a clock analysis system for rapid prototyping of embedded applications on MPSoCs.
Proceedings of the Workshop on Software and Compilers for Embedded Systems, 2012
Design space exploration in application-specific hardware synthesis for multiple communicating nested loops.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012
Proceedings of the 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, 2012
Transformation-Based Exploration of Data Parallel Architecture for Customizable Hardware: A JPEG Encoder Case Study.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Design and Analysis for Multi-Clock and Data-Intensive Applications on Multiprocessor Systems-on-Chip.
, 2012
2011
Modélisation UML/MARTE de SoC et analyse temporelle basée sur l'approche synchrone. Vers l'exploration à haut niveau de l'architecture.
Tech. Sci. Informatiques, 2011
ACM Trans. Embed. Comput. Syst., 2011
SMT based false causal loop detection during code synthesis from Polychronous specifications.
Proceedings of the 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011
Static analysis of synchronous programs in signal for efficient design of multi-clocked embedded systems.
Proceedings of the ACM SIGPLAN/SIGBED 2011 conference on Languages, 2011
2010
The Signal Synchronous Multiclock Approach to the Design of Distributed Embedded Systems.
IEEE Trans. Parallel Distributed Syst., 2010
Targeting reconfigurable FPGA based SoCs using the UML MARTE profile: from high abstraction levels to code generation.
Int. J. Embed. Syst., 2010
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
Operational Semantics of the Marte Repetitive Structure Modeling Concepts for Data-Parallel Applications Design.
Proceedings of the Ninth International Symposium on Parallel and Distributed Computing, 2010
Architecture Exploration for Efficient Data Transfer and Storage in Data-Parallel Applications.
Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010
Designing Embedded Systems with the SIGNAL Programming Language - Synchronous, Reactive Specification.
Springer, ISBN: 978-1-4419-0940-4, 2010
2009
Scalable Comput. Pract. Exp., 2009
J. Log. Algebraic Methods Program., 2009
Proceedings of the International Conference on Embedded Software and Systems, 2009
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
2008
Innov. Syst. Softw. Eng., 2008
EURASIP J. Embed. Syst., 2008
Proceedings of the 7th International Symposium on Parallel and Distributed Computing (ISPDC 2008), 2008
Proceedings of the Forum on specification and Design Languages, 2008
Proceedings of the 15th Annual IEEE International Conference and Workshop on Engineering of Computer Based Systems (ECBS 2008), 31 March, 2008
2007
ACM Trans. Softw. Eng. Methodol., 2007
Model Transformations from a Data Parallel Formalism towards Synchronous Languages.
Proceedings of the Forum on specification and Design Languages, 2007
2006
J. Embed. Comput., 2006
Proceedings of the 32nd EUROMICRO Conference on Software Engineering and Advanced Applications (EUROMICRO-SEAA 2006), August 29, 2006
Proceedings of the 6th ACM & IEEE International conference on Embedded software, 2006
2004
Modélisation polychrone et évaluation de systèmes temps réel. (Polychronous modeling and evaluation of real-time systems).
PhD thesis, 2004
Proceedings of the 4th International Conference on Application of Concurrency to System Design (ACSD 2004), 2004
2003
Modeling of Avionics Applications and Performance Evaluation Techniques Using the Synchronous Language SIGNAL.
Proceedings of the Synchronous Languages, Applications and Programming, 2003
Proceedings of the 9th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2003), 2003
Proceedings of the Scientific Engineering of Distributed Java Applications, 2003
Proceedings of the 10th IEEE International Conference on Engineering of Computer-Based Systems (ECBS 2003), 2003